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  • Crystals and Oscillators

    Most FPGA designs require stable clock signals, usually generated either from "crystals" or "oscillators". See Ecliptek, SaRonix and Vite as examples of quartz crystals and oscillators manufacturers.

    Crystals contain a resonator (Quartz) but no electronic and do not oscillate by themselves.
    Oscillators contain both the resonator and the electronic (amplifier) required to maintain the oscillations.

    The main parameter of a crystal/oscillator is the resonance frequency. The Quartz is cut at the factory, so if you want a different frequency, you have to use a different part. It is useful to have a few different parts available during FPGA prototyping.

    How do they look?

    Crystals (2 pins):

    • 1. HC-49/SD crystal (SMD)
    • 2. HC-49/US crystal
    • 3. HC-49/U crystal

    Oscillators (4 pins):

    • 4. DIL-14 "Full size" metal case (the metal case brought the nickname "canned oscillator")
    • 5. DIL-8 "Half size" metal case
    • 6. DIL-8 "Half size" plastic case
    • 7. 5x7mm metal case (SMD)
    "Quartz crystals" (or simply "crystals")

    They come in 2 (or 3, see below) pins packages. They don't have an orientation because they are symmetrical, so the two pins are interchangeable.
    Their big advantage is the price, a few $0.10's instead of $1.00's for oscillators.

    Crystals require external electronic to oscillate. Crystals are more "analog" components than "digital", and require analog amplifiers to get sustained oscillations.

    The simplest way is to use an "unbuffered" inverter gate. See for example the 74LVC1GX04 and 74HCU04.

    If is also possible to use regular "buffered" gates, but the more "digital" the gate used, the harder it is to get an oscillation under wide conditions (frequency/voltage/temperature). For that reason, it is difficult to use FPGA "gates" to build an oscillator from a crystal. See for example this post from comp.arch.fpga.

    Some crystals have a third pin in between the other two - nothing to worry, that's just a ground pin. Crystals with only 2 pins have the metal case "floating", so it is recommended to manually solder the case to ground.

    "Quartz oscillators" (or "crystals oscillators", or simply "oscillators")

    Nowadays, most FPGA boards use oscillators.
    They come in 4 pins packages and contain the electronic required to oscillate, so that an oscillator generates a clock by itself when it is powered-up.

    The 4 pins are typically as follow:

    1. Enable
    2. GND
    3. Output
    4. VCC (typically 3.3V or 5V)

    The Enable pin is set to GND to disable the oscillator output (high-impedance), and set to VCC (or left floating) to enable the output. Some oscillators are also turned off completely when Enable is low (to save power).

    The metal case of canned oscillators is connected to ground and provides shielding.

    Oscillators in DIL package

    DIL oscillators are leaded parts that can be easily socketed. That is a precious feature during prototyping.

    Oscillators power

    Oscillators are made to work at a specific voltage. That's typically 3.3V or 5V.
    Sometimes a 5V oscillator has no problem at 3.3V - so it's always worth trying if you miss a frequency during prototyping.

    Oscillators draw more current as they run faster. If a 25MHz oscillator draws 10mA, expect a 50MHz oscillator from the same family to draw close to 20mA.

    Crystals and Oscillators precision

    The Quartz produce a very precise and stable frequency. It is so precise that the frequency is not rated in percent, but in ppm (parts per million), or 0.0001%

    High precision crystals and oscillators run at +/-10ppm.
    Common precision ones run around +/-50ppm to +/-100ppm. Still pretty amazing.

    Clock generation from a clock synthesizer

    Clock signals can be generated from clock synthesizer components (often based on PLLs). These are great because they can be programmed to generate a wide range of frequencies.
    PLLs have some nice applications, like carrier synchronization, clock regeneration (jitter reduction of bad clocks)... see for example the Si5310 clock multiplier.

    There is one drawback to using this type of component: they tend to generate signals with a larger jitter than fixed frequency oscillators. The jitter is the measure of how "regular" the clock is.
    Having a low jitter is desirable, mainly because jitter needs to be subtracted from the timing margins, so if your design is very timing critical, an oscillator might be a better choice. Low jitter is also necessary in some communication applications.

    Link:   http://www.fpga4fun.com/oscillators.html AND Understanding and Characterizing Timing Jitter Tektronix white paper





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  • 原文地址:https://www.cnblogs.com/Zero_Victor/p/3017639.html
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