用de1读取sram的数据并用数码管输出

下面是我的程序代码，请大牛们不吝赐教。

module sramtest
    (
        ////////////////////    Clock Input         ////////////////////    
        CLOCK_50,                        //    50 MHz
        SRAM_DQ,                        //    SRAM Data bus 16 Bits
        SRAM_ADDR,                        //    SRAM Address bus 18 Bits
        SRAM_UB_N,                        //    SRAM High-byte Data Mask
        SRAM_LB_N,                        //    SRAM Low-byte Data Mask
        SRAM_WE_N,                        //    SRAM Write Enable
        SRAM_CE_N,                        //    SRAM Chip Enable
        SRAM_OE_N,                        //    SRAM Output Enable
        HEX0,                            //    Seven Segment Digit 0
        HEX1,                            //    Seven Segment Digit 1
        HEX2,                            //    Seven Segment Digit 2
        HEX3
    );

input            CLOCK_50;                //    50 MHz
////////////////////////    SRAM Interface    ////////////////////////
inout    [15:0]    SRAM_DQ;                //    SRAM Data bus 16 Bits
output    [17:0]    SRAM_ADDR;                //    SRAM Address bus 18 Bits
output            SRAM_UB_N;                //    SRAM High-byte Data Mask
output            SRAM_LB_N;                //    SRAM Low-byte Data Mask
output            SRAM_WE_N;                //    SRAM Write Enable
output            SRAM_CE_N;                //    SRAM Chip Enable
output            SRAM_OE_N;                //    SRAM Output Enable
output    [6:0]    HEX0;                    //    Seven Segment Digit 0
output    [6:0]    HEX1;                    //    Seven Segment Digit 1
output    [6:0]    HEX2;                    //    Seven Segment Digit 2
output    [6:0]    HEX3;

wire    [15:0]    mSEG7_DIG;
reg    [17:0]    SRAM_ADDR;                //    SRAM Address bus 18 Bits
reg            SRAM_UB_N;                //    SRAM High-byte Data Mask
reg            SRAM_LB_N;                //    SRAM Low-byte Data Mask
reg            SRAM_WE_N;                //    SRAM Write Enable
reg            SRAM_CE_N;                //    SRAM Chip Enable
reg            SRAM_OE_N;
reg [15:0]SRAM_DQ;
reg [3:0] data;
reg [1:0] state ;
assign    mSEG7_DIG    =SRAM_DQ;

SEG7_LUT_4             u0    (    HEX0,HEX1,HEX2,HEX3,mSEG7_DIG );
reg [23:0]counter;
always@(posedge CLOCK_50)//读取sram的数据
begin
case(state)
'b00:    begin
    SRAM_OE_N<=0;
    SRAM_CE_N<=0;   
    SRAM_LB_N<=0;
    SRAM_UB_N<=0;
    SRAM_WE_N<=1;

    state=state+1;
    end
'b01:begin
if(counter=='hfffff)state='b11;//延时
counter=counter+1;
end
'b10: state='b11;

'b11:    begin
    SRAM_ADDR=SRAM_ADDR+1;
    SRAM_OE_N<=1;
    SRAM_CE_N<=1;   
    SRAM_LB_N<=1;
    SRAM_UB_N<=1;
    SRAM_WE_N<=0;
    state='b00;
    end
endcase
end

endmodule