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  • TI tlv320aic3104 codec调试之增益控制

    input path

    数字增益
    Register 15: Left-ADC PGA Gain Control Register
    Register 16: Right-ADC PGA Gain Control Register

    输入端模拟增益
    Register 17: MIC2L/R to Left-ADC Control Register
    Register 18: MIC2/LINE2 to Right-ADC Control Register
    Register 19: MIC1LP/LINE1LP to Left-ADC Control Register
    Register 21: MIC1RP/LINE1RP to Left-ADC Control Register
    Register 22: MIC1RP/LINE1RP to Right-ADC Control Register
    Register 24: MIC1LP/LINE1LP to Right-ADC Control Register

    Register 25: MICBIAS Control Register

    output path

    数字增益
    Register 43: Left-DAC Digital Volume Control Register
    Register 44: Right-DAC Digital Volume Control Register

    输出端模拟增益
    Register 46: PGA_L to HPLOUT Volume Control Register
    Register 47: DAC_L1 to HPLOUT Volume Control Register
    Register 49: PGA_R to HPLOUT Volume Control Register
    Register 50: DAC_R1 to HPLOUT Volume Control Register
    Register 51: HPLOUT Output Level Control Register

    Register 53: PGA_L to HPLCOM Volume Control Register
    Register 54: DAC_L1 to HPLCOM Volume Control Register
    Register 56: PGA_R to HPLCOM Volume Control Register
    Register 57: DAC_R1 to HPLCOM Volume Control Register
    Register 58: HPLCOM Output Level Control Register

    Register 60: PGA_L to HPROUT Volume Control Register
    Register 61: DAC_L1 to HPROUT Volume Control Register
    Register 63: PGA_R to HPROUT Volume Control Register
    Register 64: DAC_R1 to HPROUT Volume Control Register
    Register 65: HPROUT Output Level Control Register

    Register 67: PGA_L to HPRCOM Volume Control Register
    Register 68: DAC_L1 to HPRCOM Volume Control Register
    Register 70: PGA_R to HPRCOM Volume Control Register
    Register 71: DAC_R1 to HPRCOM Volume Control Register
    Register 72: HPRCOM Output Level Control Register

    Register 81: PGA_L to LEFT_LOP/M Volume Control Register
    Register 82: DAC_L1 to LEFT_LOP/M Volume Control Register
    Register 84: PGA_R to LEFT_LOP/M Volume Control Register
    Register 85: DAC_R1 to LEFT_LOP/M Volume Control Register
    Register 86: LEFT_LOP/M Output Level Control Register

    Register 88: PGA_L to RIGHT_LOP/M Volume Control Register
    Register 89: DAC_L1 to RIGHT_LOP/M Volume Control Register
    Register 91: PGA_R to RIGHT_LOP/M Volume Control Register
    Register 92: DAC_R1 to RIGHT_LOP/M Volume Control Register
    Register 93: RIGHT_LOP/M Output Level Control Register

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  • 原文地址:https://www.cnblogs.com/bobfly1984/p/14484339.html
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