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  • MTD系统架构和yaffs2使用、Nandflash驱动设计

    一、MTD系统架构

    1.MTD设备体验

    FLASH在嵌入式系统中是必不可少的，它是bootloader、linux内核和文件系统的最佳载体。

    在Linux内核中引入了MTD子系统为NORFLASH和NAND FLASH设备提供统一的接口，从而使得FLASH驱动的设计大为简化。

    1. cat /proc/mtd
    每个分区对应一个块设备
    1. ls -l /dev/mtd*
    2. crw-rw---- 1 0 0 90, 0 Jan 1 00:00 /dev/mtd0
    3. crw-rw---- 1 0 0 90, 1 Jan 1 00:00 /dev/mtd0ro
    4. crw-rw---- 1 0 0 90, 2 Jan 1 00:00 /dev/mtd1
    5. crw-rw---- 1 0 0 90, 3 Jan 1 00:00 /dev/mtd1ro
    6. crw-rw---- 1 0 0 90, 4 Jan 1 00:00 /dev/mtd2
    7. crw-rw---- 1 0 0 90, 5 Jan 1 00:00 /dev/mtd2ro
    8. brw-rw---- 1 0 0 31, 0 Jan 1 00:00 /dev/mtdblock0
    9. brw-rw---- 1 0 0 31, 1 Jan 1 00:00 /dev/mtdblock1
    10. brw-rw---- 1 0 0 31, 2 Jan 1 00:00 /dev/mtdblock2


    2.块设备驱动系统架构


    二、YAFFS2文件系统应用

    1.MTD分区设置
    配置linux内核支持mtd，找到mtd接口文件，设置空间大小。
    2.Yaffs2文件系统制作
    将rootfs格式化生成yaffs文件系统。

    1. /home/win/mkyaffs2image ./rootfs/ rootfs.img

    3.Uboot参数设置
    在uboot_tq2440includeconfigsTQ2440.h中有uboot的启动配置选项
    1. #define CONFIG_BZIP2
    2. #define CONFIG_LZO
    3. #define CONFIG_LZMA
    4. #define CONFIG_CMD_NAND_YAFFS
    5. #define CONFIG_BOOTARGS "console=ttySAC0 root=/dev/mtdblock3"
    6. #define CONFIG_BOOTCOMMAND "nand read 0x30000000 kernel;bootm 0x30000000"

    4.下载烧写与启动

    在uboot中用dnw下载

    三、Nandflash驱动设计
    s3c2410.c/s3c24xx_nand_probe:

    1. static int s3c24xx_nand_probe(struct platform_device *pdev,
    2.              enum s3c_cpu_type cpu_type)
    3. {
    4.     struct s3c2410_platform_nand *plat = to_nand_plat(pdev);
    5.     struct s3c2410_nand_info *info;
    6.     struct s3c2410_nand_mtd *nmtd;
    7.     struct s3c2410_nand_set *sets;
    8.     struct resource *res;
    9.     int err = 0;
    10.     int size;
    11.     int nr_sets;
    12.     int setno;

    14.     pr_debug("s3c2410_nand_probe(%p) ", pdev);

    16.     info = kmalloc(sizeof(*info), GFP_KERNEL);
    17.     if (info == NULL) {
    18.         dev_err(&pdev->dev, "no memory for flash info ");
    19.         err = -ENOMEM;
    20.         goto exit_error;
    21.     }

    23.     memset(info, 0, sizeof(*info));
    24.     platform_set_drvdata(pdev, info);

    26.     spin_lock_init(&info->controller.lock);
    27.     init_waitqueue_head(&info->controller.wq);

    29.     /* get the clock source and enable it */

    31.     info->clk = clk_get(&pdev->dev, "nand");                                  //获取时钟，并使能
    32.     if (IS_ERR(info->clk)) {
    33.         dev_err(&pdev->dev, "failed to get clock ");
    34.         err = -ENOENT;
    35.         goto exit_error;
    36.     }

    38.     clk_enable(info->clk);

    40.     /* allocate and map the resource */

    42.     /* currently we assume we have the one resource */
    43.     res = pdev->resource;
    44.     size = res->end - res->start + 1;

    46.     info->area = request_mem_region(res->start, size, pdev->name);                         //地址转换

    48.     if (info->area == NULL) {
    49.         dev_err(&pdev->dev, "cannot reserve register region ");
    50.         err = -ENOENT;
    51.         goto exit_error;
    52.     }

    54.     info->device = &pdev->dev;
    55.     info->platform = plat;
    56.     info->regs = ioremap(res->start, size);
    57.     info->cpu_type = cpu_type;

    59.     if (info->regs == NULL) {
    60.         dev_err(&pdev->dev, "cannot reserve register region ");
    61.         err = -EIO;
    62.         goto exit_error;
    63.     }

    65.     dev_dbg(&pdev->dev, "mapped registers at %p ", info->regs);

    67.     /* initialise the hardware */

    69.     err = s3c2410_nand_inithw(info);                                                        //初始化硬件
    70.     if (err != 0)
    71.         goto exit_error;

    73.     sets = (plat != NULL) ? plat->sets : NULL;
    74.     nr_sets = (plat != NULL) ? plat->nr_sets : 1;

    76.     info->mtd_count = nr_sets;

    78.     /* allocate our information */

    80.     size = nr_sets * sizeof(*info->mtds);
    81.     info->mtds = kmalloc(size, GFP_KERNEL);
    82.     if (info->mtds == NULL) {
    83.         dev_err(&pdev->dev, "failed to allocate mtd storage ");
    84.         err = -ENOMEM;
    85.         goto exit_error;
    86.     }

    88.     memset(info->mtds, 0, size);

    90.     /* initialise all possible chips */

    92.     nmtd = info->mtds;

    94.     for (setno = 0; setno < nr_sets; setno++, nmtd++) {
    95.         pr_debug("initialising set %d (%p, info %p) ", setno, nmtd, info);

    97.         s3c2410_nand_init_chip(info, nmtd, sets);                                               //里面有校验nandflash

    99.         nmtd->scan_res = nand_scan_ident(&nmtd->mtd,                                            //搜索nandflash
    100.                          (sets) ? sets->nr_chips : 1);

    102.         if (nmtd->scan_res == 0) {
    103.             s3c2410_nand_update_chip(info, nmtd);
    104.             nand_scan_tail(&nmtd->mtd);
    105.             s3c2410_nand_add_partition(info, nmtd, sets);                                        //注册分区信息
    106.         }

    108.         if (sets != NULL)
    109.             sets++;
    110.     }

    112.     err = s3c2410_nand_cpufreq_register(info);
    113.     if (err < 0) {
    114.         dev_err(&pdev->dev, "failed to init cpufreq support ");
    115.         goto exit_error;
    116.     }

    118.     if (allow_clk_stop(info)) {
    119.         dev_info(&pdev->dev, "clock idle support enabled ");
    120.         clk_disable(info->clk);
    121.     }

    123.     pr_debug("initialised ok ");
    124.     return 0;

    126.  exit_error:
    127.     s3c2410_nand_remove(pdev);

    129.     if (err == 0)
    130.         err = -EINVAL;
    131.     return err;
    132. }
    MTD通用驱动部分nand_base.c（nand_read：
    1. static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,
    2.          size_t *retlen, uint8_t *buf)
    3. {
    4.     struct nand_chip *chip = mtd->priv;
    5.     int ret;

    7.     /* Do not allow reads past end of device */
    8.     if ((from + len) > mtd->size)
    9.         return -EINVAL;
    10.     if (!len)
    11.         return 0;

    13.     nand_get_device(chip, mtd, FL_READING);

    15.     chip->ops.len = len;
    16.     chip->ops.datbuf = buf;
    17.     chip->ops.oobbuf = NULL;

    19.     ret = nand_do_read_ops(mtd, from, &chip->ops);                                       //进行读操作的代码

    21.     *retlen = chip->ops.retlen;

    23.     nand_release_device(mtd);

    25.     return ret;
    26. }
    nand_do_read_ops:
    1. /**
    2.  * nand_do_read_ops - [Internal] Read data with ECC
    3.  *
    4.  * @mtd:    MTD device structure
    5.  * @from:    offset to read from
    6.  * @ops:    oob ops structure
    7.  *
    8.  * Internal function. Called with chip held.
    9.  */
    10. static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
    11.              struct mtd_oob_ops *ops)
    12. {
    13.     int chipnr, page, realpage, col, bytes, aligned;
    14.     struct nand_chip *chip = mtd->priv;
    15.     struct mtd_ecc_stats stats;
    16.     int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
    17.     int sndcmd = 1;
    18.     int ret = 0;
    19.     uint32_t readlen = ops->len;
    20.     uint32_t oobreadlen = ops->ooblen;
    21.     uint8_t *bufpoi, *oob, *buf;

    23.     stats = mtd->ecc_stats;

    25.     chipnr = (int)(from >> chip->chip_shift);
    26.     chip->select_chip(mtd, chipnr);

    28.     realpage = (int)(from >> chip->page_shift);
    29.     page = realpage & chip->pagemask;

    31.     col = (int)(from & (mtd->writesize - 1));

    33.     buf = ops->datbuf;
    34.     oob = ops->oobbuf;

    36.     while(1) {
    37.         bytes = min(mtd->writesize - col, readlen);
    38.         aligned = (bytes == mtd->writesize);

    40.         /* Is the current page in the buffer ? */
    41.         if (realpage != chip->pagebuf || oob) {
    42.             bufpoi = aligned ? buf : chip->buffers->databuf;

    44.             if (likely(sndcmd)) {
    45.                 chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);                                              //实际对应了nand_command_lp,cmd命令是0
    46.                 sndcmd = 0;
    47.             }

    49.         .........
    50. }
    nand_command_lp:
    1. static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
    2.              int column, int page_addr)
    3. {
    4.     register struct nand_chip *chip = mtd->priv;

    6.     /* Emulate NAND_CMD_READOOB */
    7.     if (command == NAND_CMD_READOOB) {
    8.         column += mtd->writesize;
    9.         command = NAND_CMD_READ0;
    10.     }

    12.     /* Command latch cycle */
    13.     chip->cmd_ctrl(mtd, command & 0xff,
    14.          NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);                                   //cmd_ctrl来源于底层驱动,在s3c2410_nand_init_chip中赋值了。

    16.     .......
    17. }
    s3c2410_nand_hwcontrol:
    1. /* s3c2410_nand_hwcontrol
    2.  *
    3.  * Issue command and address cycles to the chip
    4. */

    6. static void s3c2410_nand_hwcontrol(struct mtd_info *mtd, int cmd,
    7.                  unsigned int ctrl)
    8. {
    9.     struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);

    11.     if (cmd == NAND_CMD_NONE)
    12.         return;

    14.     if (ctrl & NAND_CLE)
    15.         writeb(cmd, info->regs + S3C2410_NFCMD);                                     //往NFCONT寄存器中写入cmd，cmd来自于nand_command,往上回溯为nand_read.其实就是发送了命令0x00
    16.     else
    17.         writeb(cmd, info->regs + S3C2410_NFADDR);
    18. }
    继续回到nand_command_lp:
    1.         ...............
    2.         if (column != -1 || page_addr != -1) {
    3.         int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE;

    5.         /* Serially input address */
    6.         if (column != -1) {
    7.             /* Adjust columns for 16 bit buswidth */
    8.             if (chip->options & NAND_BUSWIDTH_16)
    9.                 column >>= 1;
    10.             chip->cmd_ctrl(mtd, column, ctrl);                                   //紧接着发送列地址
    11.             ctrl &= ~NAND_CTRL_CHANGE;
    12.             chip->cmd_ctrl(mtd, column >> 8, ctrl);
    13.         }
    14.         if (page_addr != -1) {
    15.             chip->cmd_ctrl(mtd, page_addr, ctrl);                                //发送行地址
    16.             chip->cmd_ctrl(mtd, page_addr >> 8,
    17.                  NAND_NCE | NAND_ALE);
    18.             /* One more address cycle for devices > 128MiB */
    19.             if (chip->chipsize > (128 << 20))
    20.                 chip->cmd_ctrl(mtd, page_addr >> 16,
    21.                      NAND_NCE | NAND_ALE);
    22.         }
    23.     }
    24.     chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);

    26.     /*
    27.      * program and erase have their own busy handlers
    28.      * status, sequential in, and deplete1 need no delay
    29.      */
    30.     switch (command) {

    32.     case NAND_CMD_CACHEDPROG:
    33.     case NAND_CMD_PAGEPROG:
    34.     case NAND_CMD_ERASE1:
    35.     case NAND_CMD_ERASE2:
    36.     case NAND_CMD_SEQIN:
    37.     case NAND_CMD_RNDIN:
    38.     case NAND_CMD_STATUS:
    39.     case NAND_CMD_DEPLETE1:
    40.         return;

    42.         /*
    43.          * read error status commands require only a short delay
    44.          */
    45.     case NAND_CMD_STATUS_ERROR:
    46.     case NAND_CMD_STATUS_ERROR0:
    47.     case NAND_CMD_STATUS_ERROR1:
    48.     case NAND_CMD_STATUS_ERROR2:
    49.     case NAND_CMD_STATUS_ERROR3:
    50.         udelay(chip->chip_delay);
    51.         return;

    53.     case NAND_CMD_RESET:
    54.         if (chip->dev_ready)
    55.             break;
    56.         udelay(chip->chip_delay);
    57.         chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
    58.              NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
    59.         chip->cmd_ctrl(mtd, NAND_CMD_NONE,
    60.              NAND_NCE | NAND_CTRL_CHANGE);
    61.         while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) ;
    62.         return;

    64.     case NAND_CMD_RNDOUT:
    65.         /* No ready / busy check necessary */
    66.         chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART,
    67.              NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
    68.         chip->cmd_ctrl(mtd, NAND_CMD_NONE,
    69.              NAND_NCE | NAND_CTRL_CHANGE);
    70.         return;

    72.     case NAND_CMD_READ0:
    73.         chip->cmd_ctrl(mtd, NAND_CMD_READSTART,                                                    //这里发送了0x30命令
    74.              NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
    75.         chip->cmd_ctrl(mtd, NAND_CMD_NONE,
    76.              NAND_NCE | NAND_CTRL_CHANGE);

    78.         /* This applies to read commands */
    79.     default:
    80.         /*
    81.          * If we don't have access to the busy pin, we apply the given
    82.          * command delay
    83.          */
    84.         if (!chip->dev_ready) {
    85.             udelay(chip->chip_delay);
    86.             return;
    87.         }
    88.     }

    90.     /* Apply this short delay always to ensure that we do wait tWB in
    91.      * any case on any machine. */
    92.     ndelay(100);

    94.     nand_wait_ready(mtd);                                                                          //wait等待
    95. }


    无欲速，无见小利。欲速，则不达；见小利，则大事不成。
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  • 原文地址：https://www.cnblogs.com/ch122633/p/7363296.html
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