A-论文一些好的句子

1. Using our techniques, task set transformation is performed by modifying the parameters related to each vertex in task graphs step by step.
2. Our transformation technique provides monotonic schedulability improvement guarantees at each step of the transformation procedure, in the sense that (从某种意义上说) it can only make individual unschedulable tasks to become schedulable, but will not cause any task that was originally schedulable to become unschedulable.
3. Although our efficient technique in general does not guarantee to find the optimal solution, in practice it is very effective in successfully transforming unschedulable task systems to schedulable ones.
4. All the results in this paper are directly applicable to these more restricted models as well. 
5. Due to the NP-Completeness of application mapping problem, an efficient algorithm for finding the optimal solution within reasonable runtime is a persistent desire.
6. However, to the best of our knowledge, FA has not been utilized in NoC mapping before, partly because of the following two challenges: the discretization character of FA and fireflies’ moving rules are difficult to be associated to the NoC mapping problem. 
7. enable (使能够)   tailor (定制)    salient（突出的）
   
8. The quality of such a mapping is defined in terms of the total communication cost of the application under this mapping.
9. As mobile applications will become more diverse as well, heterogeneous computing architectures, especially ARM’s big.LITTLE, are deemed a promising solution for the emerging genre of mobile devices. 
   
10. The theoretical basis for this work is grounded in our earlier work on dual-priority scheduling that integrates and subsumes both preemptive and non-preemptive scheduling models and provides parametric control over the degree of non-preemptability in the system.  
    
11. Moreover, by doing so, we can also potentially make task sets schedulable that are not schedulable under both preemptive and non-preemptive schedulers.
12.  In the presence of a large number of PEs, the standard bus based communication architectures are no longer able to meet the performance demands, as the bus becomes the communication bottleneck.

13. The SMART NoC architecture exploits the fact that an electrical signal can propagate multiple tile (hop) distances in a single clock cycle with the help of appropriately-sized asynchronous repeaters.

14. Hence, under contention, packets accumulate wait times at the input channels of the routers in their paths.

15. Despite its significance to embedded systems industry and research communities, little research has been done on providing guarantees for hard real-time applications composed of multiple communicating components running over NoC platforms, in such systems both the computation and the communication between the components must complete within certain deadlines for the system to behave correctly.
16. A brief description of the development and experimentation framework will follow and finally experimental results will be demonstrated, together with the relevant conclusions.

17. A feature of the priority-preemptive scheduling is that it always prioritizes the task with higher priority.

18. These experiments show that the communication time is inferior to (不及) 6% of the computation time.

19. TGFF was originally developed in 1998 by R.P. Dick and D.L. Rhodes to facilitate standardized random benchmarks for scheduling and allocation research, in general, and hardware-software co-synthesis research, in particular.

20. TGFF is suitable for many applications that require generating pseudo-random graphs.

21. Experiment results show that significant resource saving can be achieved with no performance degradation in terms of missed deadlines.

22. For hard real-time services, the static analysis is performed on the resulting NoC instance to make sure that the packet deliveries never violate their  timing constraints.

23. Although task mapping and scheduling in wired networks of processors has been well studied in the past, its counterpart for WSNs remains largely unexplored.
24. The Time Sensitive Networking (TSN) working group was founded as a continuation of the AVB group with the objective to provide quality of service to real-time and time-sensitive traffic.

25. However, they are incompatible with each other, and as a result, they cannot operate on the same physical links in a network without losing real-time guarantees.

26. AVB uses the Credit-Based Shaper (CBS) to prevent the starvation of lower priority flows.

27. There are no other higher priority AVB frames being transmitted.

28. Single-cycle multihop asynchronous repeated traversal (SMART) creates virtual single-cycle paths across the shared network between cores, potentially offering significant reductions in runtime latency and energy expenditure (开销).
29. Multicore chip architectures require scalable network topologies, such as meshes, that facilitate ommunication between cores.
30. In an actual SoC, this mapping may not be able to change drastically across applications, as cores are often heterogeneous and certain tasks are tied to specific cores. This results in longer paths, which would magnify the benefits of SMART.

31. Because we know these flows in advance, we can reconfigure the network before running the application, creating single-cycle SMART paths between nodes that communicate regularly and are physically far apart, based on an application’s task communication graph.

32. In this paper, we propose Single-cycle Multihop Asynchronous Repeated Traversal (SMART) NoC, a NoC that reconfigures and tailors a generic mesh topology for SoC applications at runtime.

33. If coupled with sophisticated link designs such as [7]–[10], these NoCs can realize a single cycle transmission between distant cores.

34. We present a novel low-swing link circuit that uses clockless repeaters to allow propogation of signals across multiple-mm within a cycle, at low energy. 

35. We also present a tool flow to perform online reconfiguration of network routers at runtime, to enable different applications to run on tailored topologies.

36. ReNoC is the closest to our work in that it also avoids latching flits at each router. However, none focused on pushing latency down further to traversing multiple hops in a cycle at high frequency.

37. A bypass path is enabled: incoming flits move directly to the crossbar, traverse it to the outgoing link, and do not get buffered/latched in the router.

38. We design a 3-stage router. In stage 1, the incoming flit gets buffered and generates an output port request based on the preset route in its header. In stage 2, all buffered flits arbitrate for access to the crossbar. In stage 3, flits traverse the crossbar and output link upon successful arbitration.

39. In this example, the green and purple flows do not overlap with any other flow, and thus traverse through a series of SMART crossbars and links, incurring just a single-cycle delay from the source NIC to the destination NIC, without entering any of the intermediate routers.

40. To gauge the performance of the proposed approach, a series of experiments are carried out.  

41. Simulations and results indicate that the proposed firefly algorithm is superior to (优越于) existing metaheuristic (元启发式) algorithms. 

42. Models for real-time systems have to balance the inherently contradicting goals of expressiveness and analysis efficiency. 

43. Building on this static analysis, for a given set of tasks and network topology, we further propose a task mapping and priority assignment algorithm, in such a way that the hard time bounds are met with a reduced hardware overhead. 

44. However, the design concept of fair scheduling and governing borrowed from legacy operating systems cannot be applied seamlessly in mobile systems, thereby degrading user experience or reducing energy efficiency.
45. In this work, we propose an analytical NoC performance analysis methodology for modeling the state-of-the-art single-cycle multi-hop asynchronous repeated traversal (SMART) NoC that enables packets to partially or completely bypass routers from source to destination. 
46. The target of graph transformation is to assign the δ(v) value for each vertex v of each task, to make the task set schedulable if it was not originally. 
47. The first job may arrive at any instant, and the arrival times of any two successive jobs are at least T_i time units apart. 
48. The ratio of the WCET of the task to its period is called the utilization of the task, and the ratio of the WCET to the smaller of its period and relative deadline is called its density.
49. The different tasks in a task system are assumed, for the most part, to be independent of each other; hence, jobs of different tasks may execute simultaneously on different processors upon a multiprocessor platform. 
50. First, one firefly can be attracted by all other fireflies, regardless of their sex, as long as the fireflies are brighter than itself.  
51. The attractiveness and brightness lay the foundation for firefly moving rules.
52. In this section, the DFA-based NoC mapping approach is elaborated in detail, including firefly structure, distance computation, firefly refreshing and movement.
53.  It is suffcient to optimize the energy consumption over one hyperperiod of the taskset r, L = LCM({Ti}), since the schedule repeats at this granularity.
54. The big.LITTLE architecture can be deployed in smartphones, with the “LITTLE” core handling normal telephony-related functions of the device, and the “big” core taking over control from the “LITTLE” core when higher levels of performance, such as multimedia playback, are needed.
55. To efficiently realize a system based on the big.LITTLE architecture, the time needed to migrate a task between the cores must be taken into account.
56. The kernel layer contains two key components, namely, the scheduler and the governor.
57. Iteration starts with an initial value 0 wi , typically wi0 = Bi + Ci , and ends when either win+1 = win in which case the worst-case response timeRi , is given by win+1 or when win+1 > Di - Ji in which case the task is unschedulable. 
58. It is interpreted as the delay of the first flit to reach the destination, augmented by the transfer delay of the rest of the flits. 

59. It should be noted that before the application is run, all the crossbar select lines are preset such that they either always receive a flit from one of the incoming links, or from a router buffer.

60. Since the routes are static, we adopt source routing and encode the route in 2 bits for each router.

61. While increasing the number of cores is not very hard (due to Moore’s Law), connecting these cores is.

62. Moreover, higher number of input/output ports at routers leads to increased complexity of the routing, allocation and crossbar blocks, increasing router delay tr and router power. 

63. Instead, most commercial and research multicore prototypes [15, 16, 36, 1] have opted for simpler topologies like rings and meshes to ease design.

64. Priority-aware networks, on the other hand, allow contention between communication flows.

65. While these techniques reduce the required buffer space (flit level) and allow multiple flit buffers (VCs) to access the same physical channel, priority-aware networks are susceptible to chain-blocking (blocked flits spanning multiple routers).

66. Kashif et al. introduce a link-level analysis (LLA) that provides tighter WCL bounds compared to FLA at the cost of a more detailed analysis.

67. FLA computes the interference that a flow under analysis τi suffers along its path δi by considering the whole path as a single shared resource.

68. This is key to the MPB problem: it is those buffered flits of tj , which have already caused interference on ti when they were first released out of node a, that will again cause interference and as a consequence will delay ti by more than tj ’s zero-load latency Cj . We refer to this effect as buffered interference, which in turn causes MPB.

69. We claim, however, that such upper bound is unnecessarily pessimistic, given that the amount of buffered interference will also be upper-bounded by the maximum amount of buffer space along the route of tj .

70. SMART is a recently proposed NoC microarchitecture that enables multihop on-chip traversals within a single cycle, removing the dependence of latency on hops.

71. The limiter to network latency today is the the conventional design philosophy of latching flits at every hop.

72. SMART provides the performance of low-diameter high-radix topologies, without actually adding additional dedicated datapaths, by enabling flits to traverse multiple hops within a single cycle, up to the distance that the underlying wire can physically allow (known as maximum hops per cycle or HPCmax).

73. If any of the intermediate routers had a locally buffered flit, the flit from router 0 would have stopped at that router, prioritizing the local flit to use the output link instead.

74. These two shortcomings, if not addressed, can significantly reduce the benefits that SMART offers.

75. The benefits of the proposed SSR network are twofold: 1) it replaces the SSR broadcast wires with shorter wires and switches (called SSR routers), which drastically reduces the wire overhead required to implement SMART and 2) it eliminates low-priority SSRs before they reach the routers, thus simplifying the allocator design.

76. It makes it possible to implement an ultralow-latency NoC at a much lower wire cost compared with the original SMART design.

77. This translates to a huge latency reduction, pushing the NoC design closer to an ideal, but not realizable, point-to-point connection. 

78. As a result, under uniform random synthetic traffic, Prio = Bypass performs similar to Prio = Local before saturation, but suffers early saturation at about half of the saturation injection rate of Prio = Local.

79. In this study, the authors propose an arbitration mechanism for NoC that leads to a reduction in congestion delay in routers as well as the network latency. The proposed mechanism is compatible with the bypass and baseline pipeline in routers.

80. We describe the BookSim network simulator that provides a large degree of flexibility and modeling fidelity for the evaluation of novel network designs.

81. The network top level module comprises a collection of routers and channels, with the topology defining how these modules are interconnected.

82. In regular VC allocation, a VC becomes available for allocation when the tail flit of the packet currently holding the VC departs the router.

83. The simulator maintains its cycle-accurate nature, and a greater emphasis is placed on the detailed modeling of network components based on realistic hardware implementations.

84. For example, age-based priority dynamically calculates each packet’s priority value based on the number of cycles that have elapsed since the packet was generated.

85. Closed-loop evaluations can be more representative of system performance, as the injection rate of packets is influenced by the network load.

86. After the onset of saturation, the accepted throughput plateaus as the network reaches its maximum capacity.