5.1. The Clock
Another way to look at this property of the combinational circuits is that if the value of the inputs changes, they output forgets its value immediately to adapt to the new result. In other words, the circuit does not remember the previous input combinations once it changes. This is an acceptable behaviour for some systems, but totally inappropriate for others.
Consider the following example. You are about to cross a street with a traffic light for the cars, and another one for pedestrians. The light is green for the cars, and you must press a button to request the car light to turn red, and the pedestrian light to turn green. The traffic light will not change until you press the button. Now let us assume that we use a combinational circuit to detect you pressing the button. Suppose it is a circuit that produces a one on its output if the button is pressed, and a zero if it is not pressed. With this functionality, you must keep pressing the button to cross the intersection. Depressing the button is a change in the input of your combinational circuit, and therefore, it will produce a change in the output. The light does not change.
This behaviour is not acceptable for this system. We want the system to remember that we pressed the button. In other words, the digital circuit should detect a change in an input signal, produce an output, and even though the input change again, maintain the value of the output in time. This is precisely the behaviour of the sequential digital circuits
A sequential digital circuit is a system in which, under certain conditions, the value of the outputs change depending on the inputs, or they remain unchanged (they are remembered) over time.
The behaviour of these new circuits is clearly more complex than the combinational circuits. The system works in two modes: either ignoring changes in the input values and remembering the last result; or paying attention to these inputs and adjusting the output accordingly. How do these circuits select between these two modes of operation?
The signal that forces a sequential circuit to behave in one of the two modes is generically known as the clock. Thus, every sequential circuit has a signal called the clock that signals when to pay attention to the value of the inputs and change the output, and when to ignore the inputs and maintain the value of the output.
The clock signal used in digital circuits is typically a square signal like the one shown in the following figure.
Clock signal used by sequential circuits
Note
When representing signals that evolve over time, we will assume always that time flows from left to right. So, the evolution of a digital signal over time will be a horizontal line with two levels, high and low. This representation is used frequently with sequential circuits.
The most important properties of this signal are:
- Over time, the value of this signal oscillates from a high level to a low level.
- The transitions from high to low levels, and vice versa, occur almost instantaneously and are called falling edge and rising edge respectively.
- The period of a clock, usually represented by
, is the time it takes the signal to make a full transition (that is, from low to high, and back to low). The frequency of a clock, usually represented by
f, is the inverse of its period, that is
The frequency of a clock signal can be seen also as the speed at which it switches between high and low values. If a digital circuit is operating with a 5 Ghz clock, it means the signal is making
full transitions (from low to high and back to low) per second.
The following figure shows a generic representation of a sequential circuit.
Generic sequential circuit with the clock as additional input
The behaviour is this new type of circuits is as follows:
- At a certain instant marked by the clock, the circuit behaves as a regular combinational circuit and the outputs take the value derived from the inputs. We will call this instance evaluation time.
- At any other times, the value of the inputs are ignored, and the outputs remain with the values calculated in the previous instant. We will call this instance memory time.
This last step is why we say that sequential circuits are those that have memory, as they can remember the values that occurred at a previous instance. Since the clock is a periodic signal, we then can assume that a sequential circuit is continuously changing from evaluation time to memory time at a pace defined by the clock signal.
As you can see, this type of circuit is the one needed to control the traffic light in the previous example. If a pedestrian pushes the button, the circuit can store and remember that value so that the light will then change to stop the cars and allow the crossing.
5.1.1. Level-Sensitive Sequential Circuits
But when exactly is a sequential circuit paying attention to its inputs or simply remembering the last value of the outputs? Currently there are two types of sequential circuits: those sensitive to a level; and those sensitive to an edge. Those sensitive to a level can be further sub-divided into those sensitive to a high level and those sensitive to a low level.
A high level sensitive sequential circuit is one in which the evaluation time occurs when the clock is at a high level. At any other time, the outputs are fixed to the values of the previous evaluation time.
Conversely, a low level sensitive sequential circuit is one in which the evaluation time occurs when the clock is at a low level. At any other time, the outputs are fixed to the values of the previous evaluation time.
The following figure shows the evaluation and memory periods for level sensitive sequential circuits and the convention to represent their clock signal (the presence or absence of a circle in the clock input).
Stages of the Level Sensitive Clock
Review questions for 5.1.1 Level-Sensitive Sequential Circuits
5.1.2. Edge-Sensitive Sequential Circuits
The second type of sequential circuits are those that have a much shorter evaluation time. Instead of using the time the clock is either high or low, they evaluate the inputs when the clock makes a transition. In other words, the inputs are only considered when the clock is in a raising edge, or in a falling edge. As in the case of the level sensitive circuits, there are two types, those sensitive to a raising edge, and those sensitive to a falling edge.
The following figure show the evolution and memory periods for edge sensitive sequential circuits and the convention to represent the clock signal (see the circle in the clock input for the falling edge sensitive sequential circuit).
Stages of the Edge Sensitive Clock
Review questions for 5.1.2 Edge-Sensitive Sequential Circuits
5.1.3. Summary of Sensitivity in Sequential Circuits
The following figure shows the behaviour of the four types of sequential circuits depending on their sensitivity. The output value is the same value of the input.
Behaviour of sequential circuits depending on their sensitivity
You may also download this figure as a PDF file
.
The input sequence makes several transitions between clock edges. The first circuit, circuit A, is high-level sensitive, thus, whenever the clock is high, the changes in the input are reflected in the output. However, when the clock is low, the circuit remembers the last value of the input (before the edge). Analogously, circuit B has similar behaviour but it is sensitive to a low clock value.
Circuits C and D are edge sensitive, thus, the changes in the input are not seen at the output. Circuit C only takes the value of the input at a rising edge, and the rest of the time sustains that value. Circuit D behaves analogously but taking the value whenever a falling edge occurs in the clock.
5.2. Flip-Flops
Once we understand the four types of sensitivity of sequential circuits, we will assume, unless otherwise noted that the sequential circuits are edge sensitive. Analogously to the logic gates that were defined as simple circuits implementing basic Boolean expressions, we have the equivalent for sequential circuits. Some of the most commonly used building blocks are called flip-flops.
A flip-flop is a sequential circuit that is edge sensitive and has one or two inputs (aside from the clock, of course) and two outputs. The two outputs, however, always provide one the opposite value of the other.
The behaviour of a combinational circuit (or a Boolean expression) was captured by the truth table. In the case of a sequential circuit the truth table is also used but with a major modification: the output column is not the immediate value of the output, but its value when the following transition is allowed by the clock. In other words, the output column of the truth table contains the future value of the output. The convention that is used to represent this column is by denoting the output with the sub-index . An example of truth table for a one input flip-flop would be:
| input | |
|---|---|
| 1 | 1 |
| 0 | 0 |
The most commonly used flip-flops when designing sequential digital circuits are: SR flip-flop, JK flip-flop, and D flip-flop. It follows a detailed description of each of them.
5.2.1. SR Flip-Flop
An SR flip-flop has two inputs, S and R (plus the clock). The inputs are used to encode three possible transitions when the clock allows them: the output is set to zero, the output is set to one, or the output remains at its current value. Additionally, the circuit has two outputs usually called Q and Q’ to represent the fact that they always produce opposite values. The truth table representing this behaviour is as follows:
| Input | Output | |
|---|---|---|
| S | R | |
| 0 | 0 | |
| 0 | 1 | 0 |
| 1 | 0 | 1 |
| 1 | 1 | undefined |
Trick
The trick to remember this truth table is to assimilate the signal S with the word set, and R with reset. Whenever S is high, it is trying to set the output, and whenever R is high, it is trying to reset the output to zero. You must remember that when both try to change the output, it is undefined.
This table contains important information about the behaviour over time of this flip-flop:
- A flip-flop only makes a transition when allowed by an edge in the clock. Thus, the value at the output only occurs at that time. At any other instant, the output remembers the value set in the previous period.
- If the clock allows a transition and both inputs S and R are set to zero, the circuit maintains its value at the output.
- If the clock allows a transition and both inputs S and R are set to one, the circuit enters an undefined state. In other words, there is no way to tell if the output will become zero or one.
The symbols used to represent the edge sensitive SR flip-flops are shown in the following figure.
The circle in the output is to represent that at all times
produces the opposite value than
. The reason for these circuits to have two inputs offering the opposite value is related to their implementation. There are a set of logic gates that are used to implement the behaviour of this flip-flop. Two of the internal signals are
, and
, and both of them are made available as outputs.
Review questions for 5.2.1 SR Flip-Flop
5.2.2. JK Flip-Flop
The SR flip-flop has only three possible behaviour changes depending on the value of its outputs. This translates into one combination of the inputs (both S and R to one) that leaves the circuit in an undefined state. The JK flip-flop is also a 2 input circuit similar to the SR but with the advantage that all four possible values at its inputs have a concrete effect on the circuit. The truth table for this sequential circuit is:
| Input | Output | |
|---|---|---|
| J | K | |
| 0 | 0 | |
| 0 | 1 | 0 |
| 1 | 0 | 1 |
| 1 | 1 | |
Trick
The trick to remember this truth table is to assimilate J to the word jump and K to the word knock-out. If none of them are active, the flip-flop remains in the same state, and if both are active, the input flips its value.
The only difference with the SR flip-flop (other than the name change in the inputs) is when both inputs J and K are set to one. In this case the output of the circuit becomes the opposite value of the output before. In other words, even though the inputs are set to a special value, the future output depends on the output at the current instant.
The other two properties of the SR flip-flop are also preserved in this circuit. A transition only occurs when allowed by the appropriate edge in the clock. If both inputs are zero and the clock allows a transition, the flip-flop maintains the value of its outputs.
The symbols used to represent the edge sensitive JK flip-flops are shown in the following figure.
The only difference with the SR flip-flop is the name of the inputs.
Review questions for 5.2.2 JK Flip-Flop
5.2.3. D Flip-Flop
The D flip-flop is one of the most common sequential circuit used when building digital systems due to its simplicity. Rather than having two inputs to encode various transitions at the output, this circuit has one single input called D (aside from the clock, of course), and the outputs simply follow the value of the input when the clock allows a transition. The truth table captures this simplicity.
| D | |
|---|---|
| 0 | 0 |
| 1 | 1 |
Trick
The trick to remember this truth table is to think of a D flip-flop as the output making a copy of the input when the clock says so and stick to that value until a new copy is allowed.
The behaviour of this flip-flop simply states that the output will follow or mimic the value of the input when the clock enables it. Otherwise, the output remains to its previous value. As in the case of the other two previous flip-flops, two outputs with opposite value are also available. This circuit does not allow the appearance of any undefined value as it is the case of the SR flip-flop.
The symbols used to represent the edge sensitive D flip-flops are shown in the following figure.
5.2.4. Examples of Circuits with Flip-Flops
As in the case of the basic logic gates, the power of the sequential circuits previously described is when combined with other circuits. One important limitation present when combining logic gates to create a combinational circuit is the need to avoid what is known as a combinational cycle or loop. Sequential circuits may handle this situation in some cases. Some of the examples described in the next sections will rely on those cycles to implement interesting sequential behaviour.
Example
A Register
One of the simplest sequential digital circuits, but also one of the most commonly used is what is known as a register. The purpose of this circuit is simply to store a number of bits given by an equal number of inputs.
Unless otherwise noted, register are typically implemented as several D flip-flops, one connected to each input and output. The following figure illustrates this construction.
The representation of a register storing 8 bits is drawn simply as a box with a clock signal and with a label in the arrow denoting the number of signals.
Example
Boolean function as input
Consider the circuit in the following figure:
The input of the D flip-flop can be an arbitrary Boolean function. The behaviour of this circuit is similar to its combinational part except for the fact that the D flip-flop copies the value of the function when a raising edge occurs and maintains that value in the output of the flip-flop even if the inputs of the circuit change.
Another way to look at this type of construction is to consider the circuit as a more stable version of its combinational part. The function at the input can change its value at various times, whereas the output of the D flip-flop will only change its value at the raising edge of the clock signal.
Question 1 Given the previous circuit, which of the following combination of inputs will produce a 1 in after the raising edge of the clock?
- X = 1, Y = 0, Z = 1
- X = 0, Y = 0, Z = 1
- X = 1, Y = 1, Z = 0
- X = 1, Y = 1, Z = 1
Example
Stable Circuit
Consider the following simple sequential circuit.
The wire connecting with D must be interpreted as the signal following the path shown by the arrow, because
is an output and D is an input. This is a totally valid circuit with a normal behaviour. The connection from
to D is what would be called a cycle or a loop in a combinational circuit, but not in this one. The value of the output is still evaluated following the value of the input whenever the clock has a rising edge (as noted by the triangle in the clock input).
But in order to know the exact evolution of this circuit we have a problem. The output will take the value of input D whenever the clock says, but D itself has the previous value of
. We need to know the initial value of
to know the future evolution of the circuit. However, in either case, if
has initial value one, or zero, the behaviour is similar, the circuit will remain with the output at the same value for ever.
Although this circuit is not very useful it shows one important property of edge sensitive sequential circuits, they can use their own output to computer the value at the inputs. It works because at the instant in which there is an edge in the clock, the new value is stored in the flip-flop, and even though the input may change, it is passed the edge and the change is not registered.
Question 2 Consider the following circuit
You don’t know the initial value of but you want to set it to 1 and then leave it at that value all the time. What value would you assign to x during first rising edge?
- Zero
- One
- One, and then maintain x to one, otherwise, the flip-flop sets
to zero
- Cannot be done with the information given
Example
Switching Circuit
Let us know consider a more interesting circuit like the ones shown in the following figure.
The two circuits in the previous figure have identical behaviour. In this case, the input D of the flip-flop receives the negated value of the output. If the output is one, D will be one, and as stated by the truth table of this flip-flop, at the next raising edge, the output will take the value of the input, thus switching its value. Now, the output has the value zero, and will set the input for the next rising edge to one. Thus, the circuit will switch the value of its input at every rising edge.
But with this circuit we still have the same issue than the previous one. What is the initial value of the output ? This value should be defined. However, note that the behaviour is the same independently of this value, the output will switch at every rising edge of the clock.
Question 3 In the circuit shown in the previous figure
- The output
- The output
- The output
- None of the above
Example
Boolean function with state inputs
Consider the circuit in the following figure:
This circuit is a generalization of the previous examples. A flip-flop (in this example a D flip-flop) may have as input a Boolean function itself with inputs coming from the outputs of the flip-flop. The truth table of this circuit is derived by considering the output of the flip-flop as a regular input to compute the value of . The truth table of the circuit shown is:
| Inputs | Output | ||
|---|---|---|---|
| x | y | ||
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 |
| 0 | 1 | 0 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 0 | 1 |
| 1 | 0 | 1 | 1 |
| 1 | 1 | 0 | 1 |
| 1 | 1 | 1 | 0 |
The third column of the previous table is calculated applying the rules of the digital gates based on the input values. This column, even though it is coming from the flip-flop, it is considered an input. Although in the circuit there are two connections from and
to the gates, only one column is needed, as they are the same variable, but with a negation.
The fourth column is stating the state of after the next rising edge of the clock.
Question 4 Compare the truth table of the previous circuit with the truth table of the SR and JK flip-flops. Do you detect any similarity?
- None
- This table encodes the same behaviour as the one defined in the truth table of the SR flip-flop.
- This table encodes the same behaviour as the one defined in the truth table of the JK flip-flop.
- This table encodes the opposite behaviour as the one defined in the truth table of the JK flip-flop
5.3. Finite State Machines
The truth table of a sequential circuit is a way to express the transition that will occur given the current value of the circuit, and the value of the inputs. This transition can also be seen as a change of state. The flip-flop is in a given state (defined by the value of its outputs) and after the clock edge, it transitions to a new state defined by its truth table. This notion of transition is extremely common when designing sequential circuits, to the point of existing a mathematical notation and a corresponding visual representation. They are known as Finite State Machines or FSMs.
Consider again the circuit that connects one output of the flip-flop with the input through an inverter in the following figure.
We can represent the states in which and
as a circles. At each rising clock edge we know that if the latch is in state
it goes to the state
and vice versa. The FSM representing this behaviour is shown in the following figure:
The circles represent the states and each of them corresponds with a different value of the output of the flip-flop. The arrows represent the transitions in the flip-flop output values when a rising edge occurs the clock.
But in a generic FSM a state may have several arrows going out, and each one is selected based on a combination of the input variables. Consider the following figure with FSM with three states and one input:
The representation on the left states explicitly the assignment for the input x to decide which transition should occur at each state. The representation in the right assumes that x is the input and only shows its value. The interpretation of edges with these labels is very simple. If the FSM is in a state, the next state will be that obtained by following the arrow with the given input value. The transition will occur, though, when the appropriate clock event occurs.
Review questions for 5_3 Finite State Machines
5.3.1. Designing FSMs
FSMs are used very commonly used when designing complex sequential digital systems. The power of this formulation derives from its capacity to capture the transition among a potentially large number of states and to add the flexibility of the transitions based on the value of the inputs.
Consider the definition of a FSM for the system shown in the following picture
Automatic door system with three sensors
The behaviour of this system can be represented by a FSM by following these steps:
- Identify the different states in the system. This is done by identifying when the system is carrying out some task, or waiting for some event to happen.
- Draw each of the states with a name in a circle.
- Identify the system inputs. These are values that are obtained from the environment and changes in any of them prompt our system to change its current state.
- For each state consider how the system should evolve for every possible combination of the input values.
- Label each transition connecting two states with the input values that are required.
You may assume that the frequency at which the FSM is going to evaluate its state and decide if it needs to change its state is higher than the frequency at which the events occur in the environment of the system being modelled.
Let us now apply these steps to the system previously presented with the automatic door.
- Four states are identified:
- The door is closed.
- The door is in the process of opening.
- The door is totally open.
- The door is in the process of closing.
- We draw these states with names Closed, Opening, Open, and Closing respectively.
- The system receives three inputs:
- signal M from the motion detector which is 0 if there is no motion, and 1 if motion is detected,
- signal P from the door motor that is 1 when the door is completely open, and 0 otherwise, and
- signal C from the door motor that is 1 when the door is completely closed, and 0 otherwise.
- We identify nine transitions between states depending on the value of only certain inputs.
- Each transition is labelled with the condition that needs to be satisfied to take place.
We can assume that the frequency by which our FSM checks the sensors and states and evaluates its transitions is much higher than the speed at which the sensors change their value.
The resulting diagram is shown in the following figure:
FSM modelling the automatic door system
The rationale behind the transitions is as follows. If the door is closed, it should remain in that state as long as the motion sensor is zero (nothing is moving). The other two variables are not relevant, as the door is assumed to be closed. Thus, this state has two transitions, either we remain in the state with M = 0, or we make a transition to the opening state when M = 1 (there is motion detected by the sensor).
The Opening state has also two possible transitions. At this point the door is opening and we now we care only about the sensor telling us that the door is completely open. While the value of that sensor is zero, we remain in the Opening state as long as necessary. Once the door is completely open sensor P now has the value 1 and it is then that we make a transition to the Open state. In this new state the door is supposed to be open and it should remain like that as long as we detect motion in the sensor. Thus, there is a transition to the same state with M = 1. But as soon as the sensor does not detect motion any more, the system should start to close the door. This is the reason for the transition between state Open and Closing with value M = 0. When the system is in the Closing state, it should remain there while both the door is not completely closed (C = 0) and the motion detector is zero (M = 0). In this state, the input telling us if the door is completely open is ignored. From the Closing state two more transitions are possible. If the door is completely closed, and the motion sensor does not detect anything, the door is then completely closed and we transition to that state. But, and this is the interesting case, if the motion sensor detects motion while the door is closing, that is, M = 1 while in state Closing, then the door should immediately move to the state Opening and pay again attention to sensor P.
In a general FSM, the inputs do not need to have binary values like the one shown as example. In fact, the inputs can be values over any collection. The transitions of a FSM will still contain mathematical equalities and inequalities unequivocally stating when a transition will occur.
Let us assume that the system previously described changed its inputs and instead of two separated sensors to detect when the door is open or close, there is one single sensor returning one of the possible three values: opened, middle or closed. The FSM can be re-defined with this new conditions as shown in the following figure:
FSM modelling the automatic door system with two sensors
The main observation in this new version is that the inputs do not necessarily need to be encoded as binary values, they can take any value from a pre-defined set. The translation of symbols, both as states or input values, to a binary representation is relevant when a FSM needs to be implemented as a sequential circuit as described in the next section.
Review questions for 5_3_1 Designing FSMs
5.3.2. From a FSM to a Sequential Digital Circuit
The importance of FSMs in the context of computer systems is because a large number of operations to carry out with circuits have a sequential behaviour that is perfectly modelled by them. The process to implement a FSM as a digital circuit uses several ingredients already explained such as Encoding set of symbols, Boolean Expressions, Canonical representations: sum of products, product of sums, and From a combinational circuit to a Boolean function.
The translation process needs the following steps:
- Identify the possible input values, and the number of states.
- Encode the input values using binary logic.
- Assign each state a binary combination (encode the states in binary).
- Create a truth table with as many rows as possible combinations of inputs and states. Aside from one column for each bit in the inputs and bit encoding the state, there should be a column for each state bit representing the next state.
- Populate the truth table by assigning to the columns representing the next state the proper encoding representing each transition.
- For each column representing the next state translate the resulting values into a Boolean expression, and itself into a circuit.
- Connect each of the resulting circuits to the input signal of a D flip-flop.
- Connect the output of the flip-flop to those inputs that represent the current state.
The previous steps are now illustrated for a simple sequential system with three steps as depicted in the following figure:
In this system there is a single input with values A and B which we will encode as A = 0 and B = 1 and will denote by the name I. Additionally, the three states will be encoded as S1 = 00, S2 = 01, and S3 = 10. The two bits used to encode the states will be called and
. The truth table derived from the previous system is:
| Inputs | Outputs | |||
|---|---|---|---|---|
| I | ||||
| 0 | 0 | 0 | 0 | 1 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 0 | 1 |
| 0 | 1 | 1 | X | X |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 0 |
| 1 | 1 | 0 | 0 | 0 |
| 1 | 1 | 1 | X | X |
The values represented by X in the output columns represent conditions that will not occur, and therefore any value (zero or one) is valid. These value are commonly known as don’t cares and when a Boolean function contain them it is said to be partially specified. The main consequence of the presence of don’t care values in a function is that we may choose any value when translating them to circuits.
Implementation of FSM with digital logic
5.3.3. Outputs of FSMs. Moore and Mealy Machines
The transitions occurring in FSMs depend on the value of the inputs, but at the same time, these systems are used to send signals to the environment (outputs) depending on the state of the system. If we refer to the examples previously discussed, there is a relation between the states Closed, Opening, Open, and Closing and the signal controlling the motor to open and close the door. Thus, the most generic application for a FSM is to receive inputs, based on those and the current state select a transition, but also produce some outputs. Depending on the signals that are considered when producing the outputs there are two types of FSMs: Moore machines and Mealy machines.
Moore machines are those FSMs that produce their outputs only using the signals that encode the state of the machine. The following diagram illustrates the blocks in these machines:
Blocks of a Moore FSM
The most important feature of a Moore machine is that the values of the outputs do not depend on the FSM inputs, they only depend on the value of the current state.
Mealy machines, on the other hand, are FSMs with outputs that may depend on both the current state and the value of the inputs. The following diagram illustrates the blocks in these machines:
Blocks of a Mealy FSM
In a Mealy machine, while being in a state, if the value of the inputs change, the value of its outputs may change as well. This situation cannot happen in a Moore machine.