zoukankan      html  css  js  c++  java
  • 【原创】The solutional manual of the Verilog HDL: A Guide to Digital Design and Synthesis (2nd)ch08

    Chapter 8. Tasks and Functions

    8.5 Exercises

    1. Define a function to calculate the factorial of a 4-bit number. The output is a 32-bit value. Invoke the function by using stimulus and check results.

    my answer:

    clip_image002

    # Factorial of 4 is 3628800

    2. Define a function to multiply two 4-bit numbers a and b. The output is an 8-bit value. Invoke the function by using stimulus and check results.

    my answer:

    clip_image004

    # a x b= 150

    3. Define a function to design an 8-function ALU that takes two 4-bit numbers a and b and computes a 5-bit result out based on a 3-bit select signal. Ignore overflow or underflow bits.

    Select Signal

    Function Output

    3’b000

    a

    3’b001

    a+b

    3’b010

    a-b

    3’b011

    a/b

    3’b100

    a%b

    3’b101

    a<<1

    3’b110

    a>>1

    3’b111

    (a>b)

    my answer:

    clip_image006

    clip_image008

    4. Define a task to compute the factorial of 4-bit number. The output is a 32-bit value. The result is assigned to the output after a delay of 10 time units.

    my answer:

    clip_image010

    clip_image012

    5. Define a task to compute even parity of a 16-bit number. The result is a 1-bit value that is assigned to the output after three positive edges of clock.(Hint: Use a repeat loop in the task).

    my answer:

    clip_image014

    clip_image016

    6. Using named events, tasks, and functions, design the traffic signal controller .

    my answer:

  • 相关阅读:
    GFS读后笔记
    BigTable读后笔记
    恢复系统基础理论
    事务基础理论
    ARIES算法简介
    怎么快速构建自己的C/C++程序?——有关编译、静态链接和SCons
    lua学习笔记
    运行时动态伪造vsprintf的va_list
    11月30日站立会议
    11月29号站立会议
  • 原文地址:https://www.cnblogs.com/halflife/p/1991013.html
Copyright © 2011-2022 走看看