MPSoC含有PS、PL;在PS和PL之间有大量接口和信号线,比如AXI、时钟、GPIO等。缺省情况下,PS和PL之间有接口和信号线被关闭。加载bit后,软件才会打开PS和PL之间的接口和信号线。比如在文件xfsbl_partition_load.c中,FSBL加载FPGA的bit后会执行下列操作,打开PS和PL之间的接口和信号线:
static u32 XFsbl_PartitionValidation(XFsblPs * FsblInstancePtr,
u32 PartitionNum)
{
......
#ifdef XFSBL_BS
if (DestinationDevice == XIH_PH_ATTRB_DEST_DEVICE_PL) {
Status = XFsbl_PLWaitForDone();
if (Status != XFSBL_SUCCESS) {
goto END;
}
/**
* PL is powered-up before its configuration, but will be in isolation.
* Now since PL configuration is done, just remove the isolation
*/
psu_ps_pl_isolation_removal_data();
/* Reset PL, if configured for */
(void)psu_ps_pl_reset_config_data();
/**
* Fsbl hook after bit stream download
*/
Status = XFsbl_HookAfterBSDownload();
if (Status != XFSBL_SUCCESS)
{
Status = XFSBL_ERROR_HOOK_AFTER_BITSTREAM_DOWNLOAD;
XFsbl_Printf(DEBUG_GENERAL,
"XFSBL_ERROR_HOOK_AFTER_BITSTREAM_DOWNLOAD
");
goto END;
}
}
#endif
......
}
在调试时,有些工程师希望FSBL不加载FPGA的bit文件,由Vivado加载FPGA的bit文件。但是Vivado加载FPGA的bit文件后,不会打开PS和PL之间的接口和信号线。这种情况下,建议在FSBL里强制开放MPSoC的PS-PL接口。可以在Xfsbl_handoff.c里屏蔽XFsbl_Handoff()中的行“if (FsblInstancePtr->ResetReason == XFSBL_PS_ONLY_RESET)”,也会执行)psu_ps_pl_isolation_removal_data()和psu_ps_pl_reset_config_data()操作,强制开放MPSoC的PS-PL接口。
u32 XFsbl_Handoff (const XFsblPs * FsblInstancePtr, u32 PartitionNum, u32 EarlyHandoff)
{
......
//if (FsblInstancePtr->ResetReason == XFSBL_PS_ONLY_RESET)
{
/**Remove PS-PL isolation to allow u-boot and linux to access PL*/
(void)psu_ps_pl_isolation_removal_data();
(void)psu_ps_pl_reset_config_data();
}
......
}
另外,psu_init.tcl里也有TCL版本的函数psu_ps_pl_isolation_removal_data()和psu_ps_pl_reset_config_data();在xsct里执行它们,也可以强制开放MPSoC的PS-PL接口。