I am working with the Sharc 21369. I am using the "Block
Based Talkthru" and making some modifications. However -
I don't really understand the DMA chaining implementation
in this example. They set up the TCB_Block arrays but they
don't seem to write all the values to the registers?
For example:
int TCB_Block_A[4] = { 0, sizeof(Block_A), 1, 0};
TCB_Block_A[0] = (int) TCB_Block_C + 3 - OFFSET + PCI ;
TCB_Block_A[3] = (unsigned int) Block_A - OFFSET ;
(for the receive, process, transmit buffers)
then they write the address of the next buff into the CPSPxx register:
*pCPSP0A = (unsigned int) TCB_Block_A - OFFSET + 3 ;
But I don't see where they tell the DMA the size, etc (how does it know when its done??) I thought that the Indexer and Modifier registers would need to be written too aswell??
Also - What is PCI and OFFSET and why are they set at 0x00080000?? And what is the +3 for?? These magic number throw me off..good question! If you look in the ADSP-21368 Processor Hardware reference manual (rev 1.0, page 2-18) available on our website, a SPORT DMA TCB comprises of four elements: the Internal Index register value, the Internal Modifier register value, the Word Count register value, and finally the Chain Pointer register value.
During TCB loading, the I/O processor loads the DMA channel parameter registers with values retrieved from internal memory. However, the address in the chain pointer register points to the highest address of the TCB (containing the index parameter). This means that the way the elments are actually stored in an array containing the TCB is as follows: the Chain Pointer value, Word Count value, Internal Modifier value, and Internal Index value.
So in your example, the TCB is defined as TCB_Block_A[4] = { 0, sizeof(Block_A), 1, 0};
TCB_Block_A[0] will hold the contents that need to be loaded into the SPORT Chain Pointer Register. Hence it is initialized to (int) TCB_Block_C + 3 - OFFSET + PCI ; in order to set up TCB chaining from Block A to Block C. The '+3' is because the chain pointer must point to the last element in the array.
TCB_Block_A[1] contains the value that will be loaded into the SPORT DMA Word Count Register and hence initialized to sizeof(Block_A).
TCB_Block_A[2] contains the value that will be loaded into the SPORT DMA Modifier Register and hence initialized to 1
TCB_Block_A[3] contains the value that will be loaded into the SPORT DMA Internal Index register. Hence it is initialized to the starting address of your buffer in memory (unsigned int) Block_A - OFFSET ;
As for your question on what PCI and OFFSET are:
The PCI bit is described in detail on page 2-16 of the above manual, and I quote:
"Bit 19 of the chain pointer register is the program-controlled interrupts
(PCI) bit. This bit controls whether an interrupt is latched after every DMA in the chain (when set), or whether the interrupt is latched after the entire DMA sequence completes (if cleared). The PCI bit only effects DMA channels that have chaining enabled.
Also, interrupt requests enabled by the PCI bit are maskable with the IMASK register. Because the PCI bit is not part of the memory address in the chain pointer
register, programs must use care when writing and reading addresses to and from the register. To prevent errors, programs should mask out the
PCI bit (bit 19) when copying the address in a chain pointer register."
Hence you see the
Its value is initialized in InitSPORT.c as:
unsigned int PCI = 0x00080000 ;
The OFFSET is simply the starting address of ADSP-2136x internal memory and also defined in InitSPORT.c as
unsigned int OFFSET = 0x00080000.
Hope this helps and answered your questions! Good luck!