带发送FIFO缓冲的RX232串口发送以及把众多文件变成“黑匣子”用于其它工程的调用

如果需要发送端不断地接收新的数据，而发送端的数据传输率低就需要一个缓冲器FIFO来缓冲数据。当你为别人做项目只是想实现功能而不想让自己的代码让别人看到，想保护自己的算法时，你可以用以下的方法。我使用的是quartus II 13。

参照：

http://www.cnblogs.com/adamite/p/qxp_vqm.html

http://blog.sina.com.cn/s/blog_6276d01c01010izc.html

以下为底层工程文件代码：

module RX232(input clkin,input CLK50,input write,input [7:0] datain,output TX );//write =2cycle
reg read;
wire [7:0]dataout;
wire empty;
wire full;
reg EN=0;
wire endtck;
reg [1:0]count=0;
wire  clk9600;
alt_9600 M0(CLK50,clk9600);
//assign clk9600=CLK50;
FIFO  M1(.clkin(clkin),.write(write),.datain(datain),.clkout(CLK50),.read(read),.dataout(dataout),.empty(empty),.full(full));
RX232_IN M2(.CLK9600(clk9600),.datain(dataout),.TX(TX),.EN(EN),.endtck(endtck));
 
always@(posedge CLK50)
begin 
    if((!empty)&(endtck) )begin read<=1; EN=1;end 
    else read<=0; 
//    if(read) begin count<=count+1; if(count==3) begin count<=0 ;EN=1;end end 
    if(read) begin read<=0;end
    if((!read)&(!endtck)) EN<=0;
    
end 

endmodule 

module RX232_IN(input CLK9600,input [7:0] datain,output reg TX,input EN,output reg endtck);

reg [7:0] temp1;
reg [7:0] temp;
reg [3:0] count=0;
reg[2:0] num=0;

always@(posedge CLK9600)
begin 
        endtck<=1;
        case(num)
           0:begin if(EN) begin num<=1;endtck<=0;end end
            1:begin endtck<=0;num<=2;end
            2:begin num<=3;temp<=datain;endtck<=0;end 
            3:begin TX<=0;num<=4;temp1<=temp;endtck<=0;end 
            4:begin count<=count+1;endtck<=0;if(count<8) begin  temp1<=temp1>>1;TX<=temp1[0];num<=4;end else begin count<=0; num<=5;end  end
            5:begin TX<=1;endtck<=1;num<=0;end 
            endcase
end 
endmodule

module FIFO(input clkin,input write,input [7:0] datain,input clkout,input read,output reg [7:0]  dataout,output reg empty,output reg full);
reg [7:0]stack[16383:0];
reg [9:0]data_in_point=0;
reg [10:0] data_in_count=0;
reg [10:0]data_out_point=0;
reg [1:0] data_in_num=0;
reg[1:0] data_out_num=0;
reg  empty1;
always@(posedge clkin)
begin     
            
                        case(data_in_num)
                           0:begin full<=0; data_in_num<=1;empty1<=1;end
                            1:if(write) begin if((data_in_count-data_out_point)>10'h3fff) begin full<=1;data_in_num<=1;end else begin data_in_point<=data_in_count[9:0];data_in_num<=2;full<=0;end end 
                            2:begin stack[data_in_point]<=datain;data_in_count<=data_in_count+1;data_in_num<=1;empty1<=0;end 
                         endcase

end 
always@(posedge clkout)
begin 
    
                    case(data_out_num)
                        0:if(empty1)begin data_out_num<=0;end else begin if((data_in_count-data_out_point)==0) begin empty<=1; data_out_num<=0;end else begin empty<=0;data_out_num<=1;end end             
                        1:if(read) begin dataout<=stack[data_out_point];data_out_num<=0;if(data_out_point==10'h3fff)data_out_point<=0; else data_out_point<=data_out_point+1; end else data_out_num<=1;
                     endcase
        
end 

endmodule

以下为生成“黑匣子”以及调用过程。

1、源工程和目标工程器件必须一致。先对源工程进行全编译，然后点击project-》Export Design Partition 生成RX232.qxp文件

2、把RX232.qxp加入到目标工程，新建实例化文件。然后点击Processing-》Start-》Start Analysis &Elaboration。

以下为目标工程文件代码：

module RX(input CLK50,output TX);
reg write;
reg [7:0] datain;
RX232 M0(CLK50,write,datain,TX);
always@(posedge CLK50)
begin 
    write<=1;
    datain<=8'haa;
end 
endmodule