1 /********************************************************************************* 2 * Company : 3 * Engineer : 空气微凉 4 * 5 * Create Date : 00:00:00 22/03/2013 6 * Design Name : 7 * Module Name : 8 * Project Name : 9 * Target Devices : 10 * Tool versions : 11 * Description : 12 * http://www.cnblogs.com/kongqiweiliang/ 13 * Dependencies : 14 * 15 * Revision : 16 * Revision : 0.01 - File Created 17 * Additional Comments : 基础实验_11_移位寄存器 ：线性反馈移位寄存器 18 ********************************************************************************/ 19 `timescale 1ns/1ps 20 `define UD #1 21 /*******************************************************************************/ 22 module LFSR 23 ( 24 //system interface 25 input iCLK_50 ,//50MHz 26 input iRESET ,//system interface 27 //Interface package 28 output reg [7:0] oDAT // 29 ); 30 //------------------------------------------------------------------------------- 31 parameter INIT = 8'b1001_0001; 32 parameter COFF = 8'b1111_0011; 33 34 wire [7:0] oDAT_N; 35 always@(posedge iCLK_50 or negedge iRESET)begin 36 if(!iRESET) 37 oDAT <= 8'h0; 38 else 39 oDAT <= oDAT_N; 40 end 41 assign oDAT_N[0] = oDAT[7]; 42 assign oDAT_N[1] = COFF[6] ? oDAT[1]^oDAT[7] : oDAT[0]; 43 assign oDAT_N[2] = COFF[5] ? oDAT[2]^oDAT[7] : oDAT[1]; 44 assign oDAT_N[3] = COFF[4] ? oDAT[3]^oDAT[7] : oDAT[2]; 45 assign oDAT_N[4] = COFF[3] ? oDAT[4]^oDAT[7] : oDAT[3]; 46 assign oDAT_N[5] = COFF[2] ? oDAT[5]^oDAT[7] : oDAT[4]; 47 assign oDAT_N[6] = COFF[1] ? oDAT[6]^oDAT[7] : oDAT[5]; 48 assign oDAT_N[7] = COFF[0] ? oDAT[7]^oDAT[7] : oDAT[6]; 49 //------------------------------------------------------------------------------- 50 endmodule