NAND Flash Page Read Command and Address

//----------------------------------------
#define NAND_CMD_READ_A              0x00   
#define NAND_CMD_READ_B              0x01
#define NAND_CMD_READ_C              0x50
                                     
#define NAND_CMD_SIGNATURE           0x90
#define NAND_CMD_STATUS              0x70
                                     
//Page Program                       
#define NAND_CMD_PAGE_PROG0          0x80
#define NAND_CMD_PAGE_PROG1          0x10
                                     
//Copy Back Program                  
#define NAND_CMD_COPY_PROG0          0x00
#define NAND_CMD_COPY_PROG1          0x8A
#define NAND_CMD_COPY_PROG2          0x10
#define NAND_CMD_BLOCK_ERASE0        0x60
#define NAND_CMD_BLOCK_ERASE1        0xD0
//Nand Flash Status                  
#define NAND_BIT_WP    0x80          // bit7        0 : Protected    1 : not protected
#define NAND_BIT_BUSY  0x60          // bit5, bit6  0 : Busy         1 : ready
#define NAND_BIT_ERR   0x01          // bit0        0 : successful   1 : Error

void nf_read(unsigned int src_addr,unsigned  char * buffer, int size)
{
    unsigned int column_addr = src_addr % 512;   // column address
    unsigned int page_address = (src_addr >> 9); // page addrress
                                         
    if ( column_addr > 255 )             // 2nd half    
      NF_CMD( NAND_CMD_READ_B );         // Read B command. cmd 0x01: Read command(start from 2nd half page)  
    else                                 // 1st half     
      NF_CMD( NAND_CMD_READ_A );         // Read A command. cmd 0x00: Read command(start from 1st half page)  
    
    NF_ADDR(column_addr & 0xff);         // Column Address
    NF_ADDR(page_address & 0xff);        // Page Address
    NF_ADDR((page_address >> 8) & 0xff); 
    NF_ADDR((page_address >> 16) & 0xff);
    ... ...
}

//------------------------------------------------------------------------------ 
// MACRO DEFINITIONS 
//------------------------------------------------------------------------------ 
//  NAND Flash Command. This appears to be generic across all NAND flash chips 
/* 
#define CMD_READ                    0x00        //  Read 
#define CMD_READ1                   0x01        //  Read1 
#define CMD_READ2                   0x50        //  Read2 
#define CMD_READID                  0x90        //  ReadID 
#define CMD_READID2                 0x91        //  Read extended ID 
#define CMD_WRITE                   0x80        //  Write phase 1 
#define CMD_WRITE2                  0x10        //  Write phase 2 
#define CMD_WRITE_DUMMY             0x80        //  Write multiplane phase 1 
#define CMD_WRITE_DUMMY2            0x11        //  Write multiplane phase 2 
#define CMD_CACHE_WR                 
#define CMD_CPYBK_WR                0x00        //  Copyback Write phase    1 
#define CMD_CPYBK_WR2               0x8A        //  Copyback Write phase    2 
#define CMD_CPYBK_WR3               0x11        //  Copyback Write phase    3 
#define CMD_CPYBK_WR_DUMMY          0x10        //  Copyback Write multiplane phase 1 
#define CMD_CPYBK_WR_DUMMY2         0x10        //  Copyback Write multiplane phase 2 
#define CMD_CPYBK_WR_DUMMY3         0x10        //  Copyback Write multiplane phase 3 
#define CMD_ERASE                   0x60        //  Erase phase 1 
#define CMD_ERASE2                  0xD0        //  Erase phase 2 
#define CMD_STATUS                  0x70        //  Status read 
#define CMD_MULTIPLANE_STATUS       0x71        //  Multiplane Status read 
#define CMD_RESET                   0xFF        //  Reset 
 
//  Status bit pattern 
#define STATUS_ERROR                0x01        //  Error 
#define STATUS_PLANE0_ERROR         0x02        //  Plane 0 Error 
#define STATUS_PLANE1_ERROR         0x02        //  Plane 1 Error 
#define STATUS_PLANE2_ERROR         0x02        //  Plane 2 Error 
#define STATUS_PLANE3_ERROR         0x02        //  Plane 3 Error 
#define STATUS_READY                0x40        //  Ready 
#define STATUS_NOT_WRITE_PROTECT    0x80        //  Not Write Protected 
 
#define ID_DONTCARE                 0xA5        // Don't care 
#define ID_MULTIPLANE               0xC0        // Multi plane operation support 
 
// NAND Flash make IDs 
#define ID_MAKER_SAMSUNG            0xEC        // Samsung 
 
#define NAND_DEVICE_ID_SIZE         4 
#define NAND_DEVICE_SUPPORTED_SPARE_SIZE        16 
*/ 
 
//------------------------------------------------------------------------------ 
//have change for K9F1G08U0A add part 
#define CMD_READ                    0x00        //  Read 
#define CMD_READ1                   0x30        //  Read1 
#define CMD_READ_COPY_BACK          0x00        //  Read for copy back 
#define CMD_READ_COPY_BACK1         0x35        //  Read for copy back1 
#define CMD_READID                  0x90        //  ReadID 
#define CMD_WRITE                   0x80        //  Write phase1 
#define CMD_WRITE2                  0x10        //  Write phase2 
#define CMD_CACHE_WR                0x80        //  Write Cache program 
#define CMD_CACHE_WR1               0x15        //  Write Cache program1 
#define CMD_COPY_BACK               0x85        //  Copy Back program 
#define CMD_COPY_BACK1              0x10        //  Copy Back program1 
#define CMD_RANDOM_DATA_INPUT       0x85        //  Random Data input 
#define CMD_RANDOM_DATA_OUTPUT      0x05        //  Random Data output 
#define CMD_RANDOM_DATA_OUTPUT1     0xE0        //  Random Data output1 
#define CMD_ERASE                   0x60        //  Erase phase 1 
#define CMD_ERASE2                  0xD0        //  Erase phase 2 
#define CMD_STATUS                  0x70        //  Read Status 
#define CMD_RESET                   0xFF        //  Reset 
 
//  Status bit pattern 
#define STATUS_ERROR                0x01        //  Error 
#define STATUS_PLANE0_ERROR         0x02        //  Plane 0 Error 
#define STATUS_PLANE1_ERROR         0x02        //  Plane 1 Error 
#define STATUS_PLANE2_ERROR         0x02        //  Plane 2 Error 
#define STATUS_PLANE3_ERROR         0x02        //  Plane 3 Error 
#define STATUS_READY                0x40        //  Ready 
#define STATUS_NOT_WRITE_PROTECT    0x80        //  Not Write Protected 
 
#define ID_DONTCARE                 0xA5        // Don't care 
#define ID_MULTIPLANE               0xC0        // Multi plane operation support 
 
// NAND Flash make IDs 
#define ID_MAKER_SAMSUNG            0xEC        // Samsung 
 
#define NAND_DEVICE_ID_SIZE         4 
#define NAND_DEVICE_SUPPORTED_SPARE_SIZE        64