The qverilog command compiles (vlog), optimizes (vopt), and simulates (vsim) Verilog and
SystemVerilog designs in a single step. It combines the compile, elaborate, and simulate phases
together, as some users may be accustomed to doing with NC-Sim. This command is provided
to ease these users’ transition to Questa SIM.
The qverilog command invokes vlog, vopt, and then vsim. All standard vlog (and vopt)
arguments are supported and are applied directly to the qverilog command line. All vsim
options are supported and are applied through the qverilog -R argument.
You can directly enter either C or C++ file onto the qverilog command line. Questa SIM
automatically processes them using the SystemVerilog Direct Programming Interface (DPI).
Refer to “DPI and the vlog Command” for details. If your design contains DPI export tasks or
functions, it is recommended that you use the vlog/vsim flow.
You can invoke the GUI by specifying the -gui argument through the qverilog -R argument.
By default, qverilog runs the simulation and quits automatically by invoking an implicit "run
-all; quit -f". However, if you invoke qverilog with -do, -gui, or -i, qverilog invokes the
simulator and keeps it open until you explicitly quit Questa SIM.
The qverilog command creates a work library named work in the current directory, if not
present already.
The command arguments listed below are only those unique to the qverilog command. This
command also supports all vlog command arguments.