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  • Chisel3

     
    介绍如何定义Wire/Reg/Memory/Prim。
     
    1. DefWire
     
    Wire()表明内括的Data的容器为线,用法为:
     
    Wire()定义如下:
    a. 获取一个t的克隆x;
    b. 定义一个Definition, 即为DefWire:DefWire(sourceInfo, x)
    c. DefWire同时也是一个Command,将其存下:pushCommand(DefWire(sourceInfo, x))
     
    pushCommand()定义如下:
    把命令c即DefWire,加入到forcedUserModule中。
     
     
    2. DefReg
     
    Reg()定义如下:
    同样调用pushCommand()把定义寄存器的命令(DefReg),添加到forcedUserModule中。
     
     
    3. DefMemory
     
    Mem()定义如下:
    调用pushCommand()把定义内存的命令(DefMemory),添加到forcedUserModule中。
     
    4. DefPrim
     
    以加法为例。
     
    作为抽象方法,定义在Num中:
     
    在子类UInt中实现,
     
     
     
    5. 附录
     
    Wire():
    trait WireFactory {
    def apply[T <: Data](t: T)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): T = {
    if (compileOptions.declaredTypeMustBeUnbound) {
    requireIsChiselType(t, "wire type")
    }
    val x = t.cloneTypeFull
     
    // Bind each element of x to being a Wire
    x.bind(WireBinding(Builder.forcedUserModule))
     
    pushCommand(DefWire(sourceInfo, x))
    if (!compileOptions.explicitInvalidate) {
    pushCommand(DefInvalid(sourceInfo, x.ref))
    }
     
    x
    }
    }
     
    Reg():
    object Reg {
    /** Creates a register without initialization (reset is ignored). Value does
    * not change unless assigned to (using the := operator).
    *
    * @param t: data type for the register
    */
    def apply[T <: Data](t: T)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): T = {
    if (compileOptions.declaredTypeMustBeUnbound) {
    requireIsChiselType(t, "reg type")
    }
    val reg = t.cloneTypeFull
    val clock = Node(Builder.forcedClock)
     
    reg.bind(RegBinding(Builder.forcedUserModule))
    pushCommand(DefReg(sourceInfo, reg, clock))
    reg
    }
    }
     
    Mem():
    object Mem {
    @chiselRuntimeDeprecated
    @deprecated("Mem argument order should be size, t; this will be removed by the official release", "chisel3")
    def apply[T <: Data](t: T, size: Int)(implicit compileOptions: CompileOptions): Mem[T] = do_apply(size, t)(UnlocatableSourceInfo, compileOptions)
     
    /** Creates a combinational/asynchronous-read, sequential/synchronous-write [[Mem]].
    *
    * @param size number of elements in the memory
    * @param t data type of memory element
    */
    def apply[T <: Data](size: Int, t: T): Mem[T] = macro MemTransform.apply[T]
    def do_apply[T <: Data](size: Int, t: T)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Mem[T] = {
    if (compileOptions.declaredTypeMustBeUnbound) {
    requireIsChiselType(t, "memory type")
    }
    val mt = t.cloneTypeFull
    val mem = new Mem(mt, size)
    pushCommand(DefMemory(sourceInfo, mem, mt, size))
    mem
    }
    }
     
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  • 原文地址:https://www.cnblogs.com/wjcdx/p/10224274.html
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