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  • FPGA pins

    转自:http://www.fpga4fun.com/FPGAinfo4.html

    FPGA pins

    FPGAs tend to have lots of pins...
    Dedicated and user pins

    FPGA pins fall into 2 categories: "dedicated pins" and "user pins".

    About 20% to 30% of the pins of an FPGA are "dedicated pins", which means that they are hard-coded to a specific function.
    The dedicated pins fall into the 3 following sub-categories.

    • Power pins: ground and core/IO power pins.
    • Configuration pins: used to "download" the FPGA.
    • Dedicated inputs, or clock pins: these are able to drive large nets inside the FPGA, suitable for clocks or signals with large fan-outs.

    The rest are user pins (called "IOs", or "I/Os", or "user I/Os", or "user IOs", or "IO pins", or ... you get the idea). IO stands for "input-output".

    • You usually have total control over user IOs. They can be programmed to be inputs, outputs, or bi-directional (tri-statable buffers).
    • Each "IO pin" is connected to an "IO cell" inside the FPGA. The "IO cells" are powered by the VCCIO pins (IO power pins).

    An FPGA has many VCCIO pins, usually all connected to the same voltage. But new generations of FPGAs have a concept of "user IO banks". The IOs are split into groups, each having its own VCCIO voltage. That allows using the FPGA as a voltage translator device, useful for example if one part of your board works with 3.3V logic, and another with 2.5V.

    FPGA power

    FPGAs usually require two voltages to operate: a "core voltage" and an "IO voltage". Each voltage is provided through separate power pins.

    • The internal core voltage (called VCCINT here) is fixed (set by the model of FPGA that you are using). It is used to power the logic gates and flipflops inside the FPGA. The voltage was 5V for older FPGA generations, and is coming down as new generations come (3.3V, 2.5V, 1.8V, 1.5V, 1.2V and even lower for the latest devices).
    • The IO voltage (called VCCIO here) is used to power the I/O blocks (= pins) of the FPGA. That voltage should match what the other devices connected to the FPGA expect.

    The internal voltage is named "VCC" for Xilinx and "VCCINT" for Altera.
    The IO voltage is named "VCCO" for Xilinx and "VCCIO" for Altera.

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  • 原文地址:https://www.cnblogs.com/xinjie/p/1522784.html
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