boot270.bin 是英特尔写的一个270的bootloader，优龙在此基础上修改了
阶段一
的主程序为src/main.s
;------------------------------------------------------------------------------
;
; COPYRIGHT (C) 2000, 2001 Intel Corporation.
;
; FILENAME: main.s
;
; PURPOSE: This file contains the platform dependent startup code. This is
; the first code to run in the system and is responsible for
; dispatching the platform dependent low-level initialization code
; to the POST initialization routine (PlatformMain()).
;
; LAST MODIFIED: $Modtime: $
;------------------------------------------------------------------------------
;/**--------------文件信息--------------------------------------------------------------------------------
;**文 件 名: main.s
;**创 建 人: hzh
;**最后修改日期: 2005-11-28
;**描 述: PXA270的启动文件，
;**
;*********************** ****************************************************************/
main.s（ADS工程中的是main_Flash.s，两个文件只有一个地方不同）中是平台相关（板级相关）的启动代码，bootloader首先运行这段代码，然后将控制权交给
阶段二boot270.c，其中PlatformMain()是主程序。
; 中断向量表
b Reset_Handler ; Must be PIC
ldr pc, =Undefined_Handler
ldr pc, =SWI_Handler
ldr pc, =Prefetch_Handler
ldr pc, =Abort_Handler
nop
ldr pc, =IRQ_Handler
ldr pc, =FIQ_Handler
Reset_Handler
;
; Put the processor into SVC mode with interrupts disabled (IRQ and FIQ).
; 进入特权模式，并进制IRQ和FIQ中断
mrs r14,CPSR ; get the processor status
bic r14,r14,#CPSR_Mode_Mask
orr r14,r14,#(CPSR_Mode_SVC:OR:CPSR_Int_Mask)
msr cpsr_cf,r14 ; SVC 32 mode with interrupts disabled
44b0的start.S中是这样写的：
reset:
/*
* set the cpu to SVC32 mode
*/
mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0x13
msr cpsr,r0
bl xlli_read_SCR ; Read the SCR and LCDCR virtual register data
xlli_xxx字样函数都定义在文件xlli_LowLev_Init.s中
IF :DEF: BOOTABLE ;如果定义了BOOTABLE这个变量，则将该工程代码作为Flash中的启动代码
;调用GPIO初始化程序
bl xlli_GPIO_init ; Init the GPIO pins to xlli defaults
;SDRAM控制寄存器初始化
mov r3, #5 ; SDRAM Buffer impedance strength
bl xlli_setBufImp ; Set SDRAM buffer Impedance
bl xlli_mem_init ; Initialize the memory controller
执行流程：
1复位
2进入SVC mode
3 xlli_read_SCR
4 xlli_GPIO_init
5 xlli_setBufImp
6 xlli_mem_init
3 xlli_read_SCR
SCR为System Configuration Register，系统配置寄存器，整个这个函数的作用就是，获取组装SCR的值，SCR各位定义如下：
|
r1 bit |
31:16 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
|
GPIO |
LCD 16位数据 |
104 |
103 |
113 |
31 |
30 |
87 |
86 |
77 |
75 |
74 |
19 |
14 |
|
功能 |
LCD |
Keypad |
AC97 |
LCD |
AC97 |
||||||||
然后将其存放到RAM中，RAM的地址在xlli_Mainstone_defs.inc文件中定义：
; Address where system configuration data is stored
;
xlli_SCR_data EQU (0x5C03FFFC) ; Address in SRAM where system config data is stored
（1）使能GPIO，不在睡眠状态
xlli_read_SCR FUNCTION
;
; Insure the RDH and PH bits on PXA27x must be clear to enable GPIO pins.
; They are sticky bits so they must be set to clear them.
;
ldr r4, =xlli_PMRCREGS_PHYSICAL_BASE
mov r2, #(xlli_PSSR_PH | xlli_PSSR_RDH) ; Set the PH and RDH bits to enable all GPIOs
str r2, [r4, #xlli_PSSR_offset] ; Enable all GPIO lines