1 /* Includes ------------------------------------------------------------------*/ 2 #include "stm32f10x_lib.h" 3 4 /******************************************************************************* 5 * Function Name : RCC_Configuration 6 * Description : Configures the different system clocks. 7 * Input : None 8 * Output : None 9 * Return : None 10 *******************************************************************************/ 11 void RCC_Configuration(void) 12 { 13 ErrorStatus HSEStartUpStatus; 14 15 /* RCC system reset(for debug purpose) */ 16 RCC_DeInit(); 17 18 /* Enable HSE */ 19 RCC_HSEConfig(RCC_HSE_ON); 20 21 /* Wait till HSE is ready */ 22 HSEStartUpStatus = RCC_WaitForHSEStartUp(); 23 24 if(HSEStartUpStatus == SUCCESS) 25 { 26 /* Enable Prefetch Buffer */ 27 FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); 28 29 /* Flash 2 wait state */ 30 FLASH_SetLatency(FLASH_Latency_2); 31 32 /* HCLK = SYSCLK */ 33 RCC_HCLKConfig(RCC_SYSCLK_Div1); 34 35 /* PCLK2 = HCLK */ 36 RCC_PCLK2Config(RCC_HCLK_Div1); 37 38 /* PCLK1 = HCLK/2 */ 39 RCC_PCLK1Config(RCC_HCLK_Div2); 40 41 /* PLLCLK = 8MHz * 9 = 72 MHz */ 42 RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); 43 44 /* Enable PLL */ 45 RCC_PLLCmd(ENABLE); 46 47 /* Wait till PLL is ready */ 48 while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) 49 { 50 } 51 52 /* Select PLL as system clock source */ 53 RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); 54 55 /* Wait till PLL is used as system clock source */ 56 while(RCC_GetSYSCLKSource() != 0x08) 57 { 58 } 59 } 60 } 61 62 /******************************************************************************* 63 * Function Name : NVIC_Configuration 64 * Description : Configures Vector Table base location. 65 * Input : None 66 * Output : None 67 * Return : None 68 *******************************************************************************/ 69 void NVIC_Configuration(void) 70 { 71 #ifdef VECT_TAB_RAM 72 /* Set the Vector Table base location at 0x20000000 */ 73 NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0); 74 #else /* VECT_TAB_FLASH */ 75 /* Set the Vector Table base location at 0x08000000 */ 76 NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0); 77 #endif 78 } 79 80 /******************************************************************************* 81 * Function Name : GPIO_Configuration 82 * Description : Configures the different GPIO ports. 83 * Input : None 84 * Output : None 85 * Return : None 86 *******************************************************************************/ 87 void GPIO_Configuration(void) 88 { 89 /* Enable GPIOC clock */ 90 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE); 91 92 GPIO_InitTypeDef GPIO_InitStructure; 93 94 /* Configure PC.06, PC.07, PC.08 and PC.09 as Output push-pull */ 95 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9; 96 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; 97 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; 98 GPIO_Init(GPIOC, &GPIO_InitStructure); 99 } 100 101 /******************************************************************************* 102 * Function Name : Delay 103 * Description : Inserts a delay time. 104 * Input : nCount: specifies the delay time length. 105 * Output : None 106 * Return : None 107 *******************************************************************************/ 108 void Delay(vu32 nCount) 109 { 110 for(; nCount != 0; nCount--); 111 } 112 113 #ifdef DEBUG 114 /******************************************************************************* 115 * Function Name : assert_failed 116 * Description : Reports the name of the source file and the source line number 117 * where the assert_param error has occurred. 118 * Input : - file: pointer to the source file name 119 * - line: assert_param error line source number 120 * Output : None 121 * Return : None 122 *******************************************************************************/ 123 void assert_failed(u8* file, u32 line) 124 { 125 /* User can add his own implementation to report the file name and line number, 126 ex: printf("Wrong parameters value: file %s on line %d ", file, line) */ 127 128 /* Infinite loop */ 129 while (1) 130 { 131 } 132 } 133 #endif 134 135 /******************************************************************************* 136 * Function Name : main 137 * Description : Main program. 138 * Input : None 139 * Output : None 140 * Return : None 141 *******************************************************************************/ 142 int main(void) 143 { 144 #ifdef DEBUG 145 debug(); 146 #endif 147 148 /* Configure the system clocks */ 149 RCC_Configuration(); 150 151 /* NVIC Configuration */ 152 NVIC_Configuration(); 153 154 /* Configure the GPIO ports */ 155 GPIO_Configuration(); 156 157 /* Infinite loop */ 158 while (1) 159 { 160 GPIO_SetBits(GPIOC,GPIO_Pin_6);//点亮LED1 161 Delay(1000000); 162 Delay(1000000);//多点亮一会，使人能看到LED的确切变化 163 GPIO_ResetBits(GPIOC,GPIO_Pin_6);//熄灭LED1 164 165 GPIO_SetBits(GPIOC,GPIO_Pin_7);//点亮LED2 166 Delay(1000000); 167 Delay(1000000); 168 GPIO_ResetBits(GPIOC,GPIO_Pin_7);//熄灭LED2 169 170 GPIO_SetBits(GPIOC,GPIO_Pin_8);//点亮LED3 171 Delay(1000000); 172 Delay(1000000); 173 GPIO_ResetBits(GPIOC,GPIO_Pin_8);//熄灭LED3 174 175 GPIO_SetBits(GPIOC,GPIO_Pin_9);//点亮LED4 176 Delay(1000000); 177 Delay(1000000); 178 GPIO_ResetBits(GPIOC,GPIO_Pin_9);//熄灭LED4 179 } 180 } 181 /*首先，main函数中的debug()函数是在哪定义的呢？是在stm32f10x_lib.c中定义的。*/ 182 #ifdef DEBUG 183 /******************************************************************************* 184 * Function Name : debug 185 * Description : This function initialize peripherals pointers. 186 * Input : None 187 * Output : None 188 * Return : None 189 *******************************************************************************/ 190 void debug(void) 191 { 192 193 /************************************* ADC ************************************/ 194 #ifdef _ADC1 195 ADC1 = (ADC_TypeDef *) ADC1_BASE; 196 #endif /*_ADC1 */ 197 198 #ifdef _ADC2 199 ADC2 = (ADC_TypeDef *) ADC2_BASE; 200 #endif /*_ADC2 */ 201 202 /************************************* BKP ************************************/ 203 #ifdef _BKP 204 BKP = (BKP_TypeDef *) BKP_BASE; 205 #endif /*_BKP */ 206 207 /************************************* CAN ************************************/ 208 #ifdef _CAN 209 CAN = (CAN_TypeDef *) CAN_BASE; 210 #endif /*_CAN */ 211 212 /************************************* DMA ************************************/ 213 #ifdef _DMA 214 DMA = (DMA_TypeDef *) DMA_BASE; 215 #endif /*_DMA */ 216 217 #ifdef _DMA_Channel1 218 DMA_Channel1 = (DMA_Channel_TypeDef *) DMA_Channel1_BASE; 219 #endif /*_DMA_Channel1 */ 220 221 #ifdef _DMA_Channel2 222 DMA_Channel2 = (DMA_Channel_TypeDef *) DMA_Channel2_BASE; 223 #endif /*_DMA_Channel2 */ 224 225 #ifdef _DMA_Channel3 226 DMA_Channel3 = (DMA_Channel_TypeDef *) DMA_Channel3_BASE; 227 #endif /*_DMA_Channel3 */ 228 229 #ifdef _DMA_Channel4 230 DMA_Channel4 = (DMA_Channel_TypeDef *) DMA_Channel4_BASE; 231 #endif /*_DMA_Channel4 */ 232 233 #ifdef _DMA_Channel5 234 DMA_Channel5 = (DMA_Channel_TypeDef *) DMA_Channel5_BASE; 235 #endif /*_DMA_Channel5 */ 236 237 #ifdef _DMA_Channel6 238 DMA_Channel6 = (DMA_Channel_TypeDef *) DMA_Channel6_BASE; 239 #endif /*_DMA_Channel6 */ 240 241 #ifdef _DMA_Channel7 242 DMA_Channel7 = (DMA_Channel_TypeDef *) DMA_Channel7_BASE; 243 #endif /*_DMA_Channel7 */ 244 245 /************************************* EXTI ***********************************/ 246 #ifdef _EXTI 247 EXTI = (EXTI_TypeDef *) EXTI_BASE; 248 #endif /*_EXTI */ 249 250 /************************************* FLASH and Option Bytes *****************/ 251 #ifdef _FLASH 252 FLASH = (FLASH_TypeDef *) FLASH_BASE; 253 OB = (OB_TypeDef *) OB_BASE; 254 #endif /*_FLASH */ 255 256 /************************************* GPIO ***********************************/ 257 #ifdef _GPIOA 258 GPIOA = (GPIO_TypeDef *) GPIOA_BASE; 259 #endif /*_GPIOA */ 260 261 #ifdef _GPIOB 262 GPIOB = (GPIO_TypeDef *) GPIOB_BASE; 263 #endif /*_GPIOB */ 264 265 #ifdef _GPIOC 266 GPIOC = (GPIO_TypeDef *) GPIOC_BASE; 267 #endif /*_GPIOC */ 268 269 #ifdef _GPIOD 270 GPIOD = (GPIO_TypeDef *) GPIOD_BASE; 271 #endif /*_GPIOD */ 272 273 #ifdef _GPIOE 274 GPIOE = (GPIO_TypeDef *) GPIOE_BASE; 275 #endif /*_GPIOE */ 276 277 #ifdef _AFIO 278 AFIO = (AFIO_TypeDef *) AFIO_BASE; 279 #endif /*_AFIO */ 280 281 /************************************* I2C ************************************/ 282 #ifdef _I2C1 283 I2C1 = (I2C_TypeDef *) I2C1_BASE; 284 #endif /*_I2C1 */ 285 286 #ifdef _I2C2 287 I2C2 = (I2C_TypeDef *) I2C2_BASE; 288 #endif /*_I2C2 */ 289 290 /************************************* IWDG ***********************************/ 291 #ifdef _IWDG 292 IWDG = (IWDG_TypeDef *) IWDG_BASE; 293 #endif /*_IWDG */ 294 295 /************************************* NVIC ***********************************/ 296 #ifdef _NVIC 297 NVIC = (NVIC_TypeDef *) NVIC_BASE; 298 SCB = (SCB_TypeDef *) SCB_BASE; 299 #endif /*_NVIC */ 300 301 /************************************* PWR ************************************/ 302 #ifdef _PWR 303 PWR = (PWR_TypeDef *) PWR_BASE; 304 #endif /*_PWR */ 305 306 /************************************* RCC ************************************/ 307 #ifdef _RCC 308 RCC = (RCC_TypeDef *) RCC_BASE; 309 #endif /*_RCC */ 310 311 /************************************* RTC ************************************/ 312 #ifdef _RTC 313 RTC = (RTC_TypeDef *) RTC_BASE; 314 #endif /*_RTC */ 315 316 /************************************* SPI ************************************/ 317 #ifdef _SPI1 318 SPI1 = (SPI_TypeDef *) SPI1_BASE; 319 #endif /*_SPI1 */ 320 321 #ifdef _SPI2 322 SPI2 = (SPI_TypeDef *) SPI2_BASE; 323 #endif /*_SPI2 */ 324 325 /************************************* SysTick ********************************/ 326 #ifdef _SysTick 327 SysTick = (SysTick_TypeDef *) SysTick_BASE; 328 #endif /*_SysTick */ 329 330 /************************************* TIM1 ***********************************/ 331 #ifdef _TIM1 332 TIM1 = (TIM1_TypeDef *) TIM1_BASE; 333 #endif /*_TIM1 */ 334 335 /************************************* TIM ************************************/ 336 #ifdef _TIM2 337 TIM2 = (TIM_TypeDef *) TIM2_BASE; 338 #endif /*_TIM2 */ 339 340 #ifdef _TIM3 341 TIM3 = (TIM_TypeDef *) TIM3_BASE; 342 #endif /*_TIM3 */ 343 344 #ifdef _TIM4 345 TIM4 = (TIM_TypeDef *) TIM4_BASE; 346 #endif /*_TIM4 */ 347 348 /************************************* USART **********************************/ 349 #ifdef _USART1 350 USART1 = (USART_TypeDef *) USART1_BASE; 351 #endif /*_USART1 */ 352 353 #ifdef _USART2 354 USART2 = (USART_TypeDef *) USART2_BASE; 355 #endif /*_USART2 */ 356 357 #ifdef _USART3 358 USART3 = (USART_TypeDef *) USART3_BASE; 359 #endif /*_USART3 */ 360 361 /************************************* WWDG ***********************************/ 362 #ifdef _WWDG 363 WWDG = (WWDG_TypeDef *) WWDG_BASE; 364 #endif /*_WWDG */ 365 } 366 #endif /* DEBUG*/ 367 /*这个看着比较熟悉，好像在哪见过，没错，在stm32f10x_map.h中就有这些定义，这就是为什么，在stm32f10x_config.h中将DEBUF宏定义注释起来时，也能编译过去的原因。*/ 368 369 370 /*在stm32f10x_lib.h上右击鼠标，open “stm32f10x_lib.h”，该文件包含了其他所有头文件，而其他所需头文件自动加入。 371 标示符：_ADC，表示如果定义了_ADC，在stm32f10x_lib.h就包含stm32f10x_adc.h，否则，不包含stm32f10x_adc.h，那么，标示符_ADC是在哪定义的呢？是在stm32f10x_conf.h中定义的。*/ 372 373 /* Includes ------------------------------------------------------------------*/ 374 #include "stm32f10x_map.h" 375 376 #ifdef _ADC 377 #include "stm32f10x_adc.h" 378 #endif /*_ADC */ 379 380 #ifdef _BKP 381 #include "stm32f10x_bkp.h" 382 #endif /*_BKP */ 383 384 #ifdef _CAN 385 #include "stm32f10x_can.h" 386 #endif /*_CAN */ 387 388 #ifdef _DMA 389 #include "stm32f10x_dma.h" 390 #endif /*_DMA */ 391 392 #ifdef _EXTI 393 #include "stm32f10x_exti.h" 394 #endif /*_EXTI */ 395 396 #ifdef _FLASH 397 #include "stm32f10x_flash.h" 398 #endif /*_FLASH */ 399 400 #ifdef _GPIO 401 #include "stm32f10x_gpio.h" 402 #endif /*_GPIO */ 403 404 #ifdef _I2C 405 #include "stm32f10x_i2c.h" 406 #endif /*_I2C */ 407 408 #ifdef _IWDG 409 #include "stm32f10x_iwdg.h" 410 #endif /*_IWDG */ 411 412 #ifdef _NVIC 413 #include "stm32f10x_nvic.h" 414 #endif /*_NVIC */ 415 416 #ifdef _PWR 417 #include "stm32f10x_pwr.h" 418 #endif /*_PWR */ 419 420 #ifdef _RCC 421 #include "stm32f10x_rcc.h" 422 #endif /*_RCC */ 423 424 #ifdef _RTC 425 #include "stm32f10x_rtc.h" 426 #endif /*_RTC */ 427 428 #ifdef _SPI 429 #include "stm32f10x_spi.h" 430 #endif /*_SPI */ 431 432 #ifdef _SysTick 433 #include "stm32f10x_systick.h" 434 #endif /*_SysTick */ 435 436 #ifdef _TIM1 437 #include "stm32f10x_tim1.h" 438 #endif /*_TIM1 */ 439 440 #ifdef _TIM 441 #include "stm32f10x_tim.h" 442 #endif /*_TIM */ 443 444 #ifdef _USART 445 #include "stm32f10x_usart.h" 446 #endif /*_USART */ 447 448 #ifdef _WWDG 449 #include "stm32f10x_wwdg.h" 450 #endif /*_WWDG */ 451 452 453 /*在stm32f10x_map.h上右击鼠标，open “stm32f10x_map.h”，打开stm32f10x_map.h文件。 454 stm32f10x_map.h文件定义了所有外设的寄存器数据结构和存储器映像。*/ 455 /* Includes ------------------------------------------------------------------*/ 456 #include "stm32f10x_conf.h" 457 #include "stm32f10x_type.h" 458 #include "cortexm3_macro.h" 459 460 /* Exported types ------------------------------------------------------------*/ 461 /******************************************************************************/ 462 /* Peripheral registers structures */ 463 /******************************************************************************/ 464 465 /*------------------------ Analog to Digital Converter -----------------------*/ 466 typedef struct 467 { 468 vu32 SR; 469 vu32 CR1; 470 vu32 CR2; 471 vu32 SMPR1; 472 vu32 SMPR2; 473 vu32 JOFR1; 474 vu32 JOFR2; 475 vu32 JOFR3; 476 vu32 JOFR4; 477 vu32 HTR; 478 vu32 LTR; 479 vu32 SQR1; 480 vu32 SQR2; 481 vu32 SQR3; 482 vu32 JSQR; 483 vu32 JDR1; 484 vu32 JDR2; 485 vu32 JDR3; 486 vu32 JDR4; 487 vu32 DR; 488 } ADC_TypeDef; 489 490 /*------------------------ Backup Registers ----------------------------------*/ 491 typedef struct 492 { 493 u32 RESERVED0; 494 vu16 DR1; 495 u16 RESERVED1; 496 vu16 DR2; 497 u16 RESERVED2; 498 vu16 DR3; 499 u16 RESERVED3; 500 vu16 DR4; 501 u16 RESERVED4; 502 vu16 DR5; 503 u16 RESERVED5; 504 vu16 DR6; 505 u16 RESERVED6; 506 vu16 DR7; 507 u16 RESERVED7; 508 vu16 DR8; 509 u16 RESERVED8; 510 vu16 DR9; 511 u16 RESERVED9; 512 vu16 DR10; 513 u16 RESERVED10; 514 vu16 RTCCR; 515 u16 RESERVED11; 516 vu16 CR; 517 u16 RESERVED12; 518 vu16 CSR; 519 u16 RESERVED13; 520 } BKP_TypeDef; 521 522 /*------------------------ Controller Area Network ---------------------------*/ 523 typedef struct 524 { 525 vu32 TIR; 526 vu32 TDTR; 527 vu32 TDLR; 528 vu32 TDHR; 529 } CAN_TxMailBox_TypeDef; 530 531 typedef struct 532 { 533 vu32 RIR; 534 vu32 RDTR; 535 vu32 RDLR; 536 vu32 RDHR; 537 } CAN_FIFOMailBox_TypeDef; 538 539 typedef struct 540 { 541 vu32 FR0; 542 vu32 FR1; 543 } CAN_FilterRegister_TypeDef; 544 545 typedef struct 546 { 547 vu32 MCR; 548 vu32 MSR; 549 vu32 TSR; 550 vu32 RF0R; 551 vu32 RF1R; 552 vu32 IER; 553 vu32 ESR; 554 vu32 BTR; 555 u32 RESERVED0[88]; 556 CAN_TxMailBox_TypeDef sTxMailBox[3]; 557 CAN_FIFOMailBox_TypeDef sFIFOMailBox[2]; 558 u32 RESERVED1[12]; 559 vu32 FMR; 560 vu32 FM0R; 561 u32 RESERVED2[1]; 562 vu32 FS0R; 563 u32 RESERVED3[1]; 564 vu32 FFA0R; 565 u32 RESERVED4[1]; 566 vu32 FA0R; 567 u32 RESERVED5[8]; 568 CAN_FilterRegister_TypeDef sFilterRegister[14]; 569 } CAN_TypeDef; 570 571 /*------------------------ DMA Controller ------------------------------------*/ 572 typedef struct 573 { 574 vu32 CCR; 575 vu32 CNDTR; 576 vu32 CPAR; 577 vu32 CMAR; 578 } DMA_Channel_TypeDef; 579 580 typedef struct 581 { 582 vu32 ISR; 583 vu32 IFCR; 584 } DMA_TypeDef; 585 586 /*------------------------ External Interrupt/Event Controller ---------------*/ 587 typedef struct 588 { 589 vu32 IMR; 590 vu32 EMR; 591 vu32 RTSR; 592 vu32 FTSR; 593 vu32 SWIER; 594 vu32 PR; 595 } EXTI_TypeDef; 596 597 /*------------------------ FLASH and Option Bytes Registers ------------------*/ 598 typedef struct 599 { 600 vu32 ACR; 601 vu32 KEYR; 602 vu32 OPTKEYR; 603 vu32 SR; 604 vu32 CR; 605 vu32 AR; 606 vu32 RESERVED; 607 vu32 OBR; 608 vu32 WRPR; 609 } FLASH_TypeDef; 610 611 typedef struct 612 { 613 vu16 RDP; 614 vu16 USER; 615 vu16 Data0; 616 vu16 Data1; 617 vu16 WRP0; 618 vu16 WRP1; 619 vu16 WRP2; 620 vu16 WRP3; 621 } OB_TypeDef; 622 623 /*------------------------ General Purpose and Alternate Function IO ---------*/ 624 typedef struct 625 { 626 vu32 CRL; 627 vu32 CRH; 628 vu32 IDR; 629 vu32 ODR; 630 vu32 BSRR; 631 vu32 BRR; 632 vu32 LCKR; 633 } GPIO_TypeDef; 634 635 typedef struct 636 { 637 vu32 EVCR; 638 vu32 MAPR; 639 vu32 EXTICR[4]; 640 } AFIO_TypeDef; 641 642 /*------------------------ Inter-integrated Circuit Interface ----------------*/ 643 typedef struct 644 { 645 vu16 CR1; 646 u16 RESERVED0; 647 vu16 CR2; 648 u16 RESERVED1; 649 vu16 OAR1; 650 u16 RESERVED2; 651 vu16 OAR2; 652 u16 RESERVED3; 653 vu16 DR; 654 u16 RESERVED4; 655 vu16 SR1; 656 u16 RESERVED5; 657 vu16 SR2; 658 u16 RESERVED6; 659 vu16 CCR; 660 u16 RESERVED7; 661 vu16 TRISE; 662 u16 RESERVED8; 663 } I2C_TypeDef; 664 665 /*------------------------ Independent WATCHDOG ------------------------------*/ 666 typedef struct 667 { 668 vu32 KR; 669 vu32 PR; 670 vu32 RLR; 671 vu32 SR; 672 } IWDG_TypeDef; 673 674 /*------------------------ Nested Vectored Interrupt Controller --------------*/ 675 typedef struct 676 { 677 vu32 ISER[2]; 678 u32 RESERVED0[30]; 679 vu32 ICER[2]; 680 u32 RSERVED1[30]; 681 vu32 ISPR[2]; 682 u32 RESERVED2[30]; 683 vu32 ICPR[2]; 684 u32 RESERVED3[30]; 685 vu32 IABR[2]; 686 u32 RESERVED4[62]; 687 vu32 IPR[11]; 688 } NVIC_TypeDef; 689 690 typedef struct 691 { 692 vuc32 CPUID; 693 vu32 ICSR; 694 vu32 VTOR; 695 vu32 AIRCR; 696 vu32 SCR; 697 vu32 CCR; 698 vu32 SHPR[3]; 699 vu32 SHCSR; 700 vu32 CFSR; 701 vu32 HFSR; 702 vu32 DFSR; 703 vu32 MMFAR; 704 vu32 BFAR; 705 vu32 AFSR; 706 } SCB_TypeDef; 707 708 /*------------------------ Power Control -------------------------------------*/ 709 typedef struct 710 { 711 vu32 CR; 712 vu32 CSR; 713 } PWR_TypeDef; 714 715 /*------------------------ Reset and Clock Control ---------------------------*/ 716 typedef struct 717 { 718 vu32 CR; 719 vu32 CFGR; 720 vu32 CIR; 721 vu32 APB2RSTR; 722 vu32 APB1RSTR; 723 vu32 AHBENR; 724 vu32 APB2ENR; 725 vu32 APB1ENR; 726 vu32 BDCR; 727 vu32 CSR; 728 } RCC_TypeDef; 729 730 /*------------------------ Real-Time Clock -----------------------------------*/ 731 typedef struct 732 { 733 vu16 CRH; 734 u16 RESERVED0; 735 vu16 CRL; 736 u16 RESERVED1; 737 vu16 PRLH; 738 u16 RESERVED2; 739 vu16 PRLL; 740 u16 RESERVED3; 741 vu16 DIVH; 742 u16 RESERVED4; 743 vu16 DIVL; 744 u16 RESERVED5; 745 vu16 CNTH; 746 u16 RESERVED6; 747 vu16 CNTL; 748 u16 RESERVED7; 749 vu16 ALRH; 750 u16 RESERVED8; 751 vu16 ALRL; 752 u16 RESERVED9; 753 } RTC_TypeDef; 754 755 /*------------------------ Serial Peripheral Interface -----------------------*/ 756 typedef struct 757 { 758 vu16 CR1; 759 u16 RESERVED0; 760 vu16 CR2; 761 u16 RESERVED1; 762 vu16 SR; 763 u16 RESERVED2; 764 vu16 DR; 765 u16 RESERVED3; 766 vu16 CRCPR; 767 u16 RESERVED4; 768 vu16 RXCRCR; 769 u16 RESERVED5; 770 vu16 TXCRCR; 771 u16 RESERVED6; 772 } SPI_TypeDef; 773 774 /*------------------------ SystemTick ----------------------------------------*/ 775 typedef struct 776 { 777 vu32 CTRL; 778 vu32 LOAD; 779 vu32 VAL; 780 vuc32 CALIB; 781 } SysTick_TypeDef; 782 783 /*------------------------ Advanced Control Timer ----------------------------*/ 784 typedef struct 785 { 786 vu16 CR1; 787 u16 RESERVED0; 788 vu16 CR2; 789 u16 RESERVED1; 790 vu16 SMCR; 791 u16 RESERVED2; 792 vu16 DIER; 793 u16 RESERVED3; 794 vu16 SR; 795 u16 RESERVED4; 796 vu16 EGR; 797 u16 RESERVED5; 798 vu16 CCMR1; 799 u16 RESERVED6; 800 vu16 CCMR2; 801 u16 RESERVED7; 802 vu16 CCER; 803 u16 RESERVED8; 804 vu16 CNT; 805 u16 RESERVED9; 806 vu16 PSC; 807 u16 RESERVED10; 808 vu16 ARR; 809 u16 RESERVED11; 810 vu16 RCR; 811 u16 RESERVED12; 812 vu16 CCR1; 813 u16 RESERVED13; 814 vu16 CCR2; 815 u16 RESERVED14; 816 vu16 CCR3; 817 u16 RESERVED15; 818 vu16 CCR4; 819 u16 RESERVED16; 820 vu16 BDTR; 821 u16 RESERVED17; 822 vu16 DCR; 823 u16 RESERVED18; 824 vu16 DMAR; 825 u16 RESERVED19; 826 } TIM1_TypeDef; 827 828 /*------------------------ General Purpose Timer -----------------------------*/ 829 typedef struct 830 { 831 vu16 CR1; 832 u16 RESERVED0; 833 vu16 CR2; 834 u16 RESERVED1; 835 vu16 SMCR; 836 u16 RESERVED2; 837 vu16 DIER; 838 u16 RESERVED3; 839 vu16 SR; 840 u16 RESERVED4; 841 vu16 EGR; 842 u16 RESERVED5; 843 vu16 CCMR1; 844 u16 RESERVED6; 845 vu16 CCMR2; 846 u16 RESERVED7; 847 vu16 CCER; 848 u16 RESERVED8; 849 vu16 CNT; 850 u16 RESERVED9; 851 vu16 PSC; 852 u16 RESERVED10; 853 vu16 ARR; 854 u16 RESERVED11[3]; 855 vu16 CCR1; 856 u16 RESERVED12; 857 vu16 CCR2; 858 u16 RESERVED13; 859 vu16 CCR3; 860 u16 RESERVED14; 861 vu16 CCR4; 862 u16 RESERVED15[3]; 863 vu16 DCR; 864 u16 RESERVED16; 865 vu16 DMAR; 866 u16 RESERVED17; 867 } TIM_TypeDef; 868 869 /*----------------- Universal Synchronous Asynchronous Receiver Transmitter --*/ 870 typedef struct 871 { 872 vu16 SR; 873 u16 RESERVED0; 874 vu16 DR; 875 u16 RESERVED1; 876 vu16 BRR; 877 u16 RESERVED2; 878 vu16 CR1; 879 u16 RESERVED3; 880 vu16 CR2; 881 u16 RESERVED4; 882 vu16 CR3; 883 u16 RESERVED5; 884 vu16 GTPR; 885 u16 RESERVED6; 886 } USART_TypeDef; 887 888 /*------------------------ Window WATCHDOG -----------------------------------*/ 889 typedef struct 890 { 891 vu32 CR; 892 vu32 CFR; 893 vu32 SR; 894 } WWDG_TypeDef; 895 896 /******************************************************************************/ 897 /* Peripheral memory map */ 898 /******************************************************************************/ 899 /* Peripheral and SRAM base address in the alias region */ 900 #define PERIPH_BB_BASE ((u32)0x42000000) 901 #define SRAM_BB_BASE ((u32)0x22000000) 902 903 /* Peripheral and SRAM base address in the bit-band region */ 904 #define SRAM_BASE ((u32)0x20000000) 905 #define PERIPH_BASE ((u32)0x40000000) 906 907 /* Flash refisters base address */ 908 #define FLASH_BASE ((u32)0x40022000) 909 /* Flash Option Bytes base address */ 910 #define OB_BASE ((u32)0x1FFFF800) 911 912 /* Peripheral memory map */ 913 #define APB1PERIPH_BASE PERIPH_BASE 914 #define APB2PERIPH_BASE (PERIPH_BASE + 0x10000) 915 #define AHBPERIPH_BASE (PERIPH_BASE + 0x20000) 916 917 #define TIM2_BASE (APB1PERIPH_BASE + 0x0000) 918 #define TIM3_BASE (APB1PERIPH_BASE + 0x0400) 919 #define TIM4_BASE (APB1PERIPH_BASE + 0x0800) 920 #define RTC_BASE (APB1PERIPH_BASE + 0x2800) 921 #define WWDG_BASE (APB1PERIPH_BASE + 0x2C00) 922 #define IWDG_BASE (APB1PERIPH_BASE + 0x3000) 923 #define SPI2_BASE (APB1PERIPH_BASE + 0x3800) 924 #define USART2_BASE (APB1PERIPH_BASE + 0x4400) 925 #define USART3_BASE (APB1PERIPH_BASE + 0x4800) 926 #define I2C1_BASE (APB1PERIPH_BASE + 0x5400) 927 #define I2C2_BASE (APB1PERIPH_BASE + 0x5800) 928 #define CAN_BASE (APB1PERIPH_BASE + 0x6400) 929 #define BKP_BASE (APB1PERIPH_BASE + 0x6C00) 930 #define PWR_BASE (APB1PERIPH_BASE + 0x7000) 931 932 #define AFIO_BASE (APB2PERIPH_BASE + 0x0000) 933 #define EXTI_BASE (APB2PERIPH_BASE + 0x0400) 934 #define GPIOA_BASE (APB2PERIPH_BASE + 0x0800) 935 #define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00) 936 #define GPIOC_BASE (APB2PERIPH_BASE + 0x1000) 937 #define GPIOD_BASE (APB2PERIPH_BASE + 0x1400) 938 #define GPIOE_BASE (APB2PERIPH_BASE + 0x1800) 939 #define ADC1_BASE (APB2PERIPH_BASE + 0x2400) 940 #define ADC2_BASE (APB2PERIPH_BASE + 0x2800) 941 #define TIM1_BASE (APB2PERIPH_BASE + 0x2C00) 942 #define SPI1_BASE (APB2PERIPH_BASE + 0x3000) 943 #define USART1_BASE (APB2PERIPH_BASE + 0x3800) 944 945 #define DMA_BASE (AHBPERIPH_BASE + 0x0000) 946 #define DMA_Channel1_BASE (AHBPERIPH_BASE + 0x0008) 947 #define DMA_Channel2_BASE (AHBPERIPH_BASE + 0x001C) 948 #define DMA_Channel3_BASE (AHBPERIPH_BASE + 0x0030) 949 #define DMA_Channel4_BASE (AHBPERIPH_BASE + 0x0044) 950 #define DMA_Channel5_BASE (AHBPERIPH_BASE + 0x0058) 951 #define DMA_Channel6_BASE (AHBPERIPH_BASE + 0x006C) 952 #define DMA_Channel7_BASE (AHBPERIPH_BASE + 0x0080) 953 #define RCC_BASE (AHBPERIPH_BASE + 0x1000) 954 955 /* System Control Space memory map */ 956 #define SCS_BASE ((u32)0xE000E000) 957 958 #define SysTick_BASE (SCS_BASE + 0x0010) 959 #define NVIC_BASE (SCS_BASE + 0x0100) 960 #define SCB_BASE (SCS_BASE + 0x0D00) 961 962 963 /******************************************************************************/ 964 /* Peripheral declaration */ 965 /******************************************************************************/ 966 967 /*------------------------ Non Debug Mode ------------------------------------*/ 968 #ifndef DEBUG 969 #ifdef _TIM2 970 #define TIM2 ((TIM_TypeDef *) TIM2_BASE) 971 #endif /*_TIM2 */ 972 973 #ifdef _TIM3 974 #define TIM3 ((TIM_TypeDef *) TIM3_BASE) 975 #endif /*_TIM3 */ 976 977 #ifdef _TIM4 978 #define TIM4 ((TIM_TypeDef *) TIM4_BASE) 979 #endif /*_TIM4 */ 980 981 #ifdef _RTC 982 #define RTC ((RTC_TypeDef *) RTC_BASE) 983 #endif /*_RTC */ 984 985 #ifdef _WWDG 986 #define WWDG ((WWDG_TypeDef *) WWDG_BASE) 987 #endif /*_WWDG */ 988 989 #ifdef _IWDG 990 #define IWDG ((IWDG_TypeDef *) IWDG_BASE) 991 #endif /*_IWDG */ 992 993 #ifdef _SPI2 994 #define SPI2 ((SPI_TypeDef *) SPI2_BASE) 995 #endif /*_SPI2 */ 996 997 #ifdef _USART2 998 #define USART2 ((USART_TypeDef *) USART2_BASE) 999 #endif /*_USART2 */ 1000 1001 #ifdef _USART3 1002 #define USART3 ((USART_TypeDef *) USART3_BASE) 1003 #endif /*_USART3 */ 1004 1005 #ifdef _I2C1 1006 #define I2C1 ((I2C_TypeDef *) I2C1_BASE) 1007 #endif /*_I2C1 */ 1008 1009 #ifdef _I2C2 1010 #define I2C2 ((I2C_TypeDef *) I2C2_BASE) 1011 #endif /*_I2C2 */ 1012 1013 #ifdef _CAN 1014 #define CAN ((CAN_TypeDef *) CAN_BASE) 1015 #endif /*_CAN */ 1016 1017 #ifdef _BKP 1018 #define BKP ((BKP_TypeDef *) BKP_BASE) 1019 #endif /*_BKP */ 1020 1021 #ifdef _PWR 1022 #define PWR ((PWR_TypeDef *) PWR_BASE) 1023 #endif /*_PWR */ 1024 1025 #ifdef _AFIO 1026 #define AFIO ((AFIO_TypeDef *) AFIO_BASE) 1027 #endif /*_AFIO */ 1028 1029 #ifdef _EXTI 1030 #define EXTI ((EXTI_TypeDef *) EXTI_BASE) 1031 #endif /*_EXTI */ 1032 1033 #ifdef _GPIOA 1034 #define GPIOA ((GPIO_TypeDef *) GPIOA_BASE) 1035 #endif /*_GPIOA */ 1036 1037 #ifdef _GPIOB 1038 #define GPIOB ((GPIO_TypeDef *) GPIOB_BASE) 1039 #endif /*_GPIOB */ 1040 1041 #ifdef _GPIOC 1042 #define GPIOC ((GPIO_TypeDef *) GPIOC_BASE) 1043 #endif /*_GPIOC */ 1044 1045 #ifdef _GPIOD 1046 #define GPIOD ((GPIO_TypeDef *) GPIOD_BASE) 1047 #endif /*_GPIOD */ 1048 1049 #ifdef _GPIOE 1050 #define GPIOE ((GPIO_TypeDef *) GPIOE_BASE) 1051 #endif /*_GPIOE */ 1052 1053 #ifdef _ADC1 1054 #define ADC1 ((ADC_TypeDef *) ADC1_BASE) 1055 #endif /*_ADC1 */ 1056 1057 #ifdef _ADC2 1058 #define ADC2 ((ADC_TypeDef *) ADC2_BASE) 1059 #endif /*_ADC2 */ 1060 1061 #ifdef _TIM1 1062 #define TIM1 ((TIM1_TypeDef *) TIM1_BASE) 1063 #endif /*_TIM1 */ 1064 1065 #ifdef _SPI1 1066 #define SPI1 ((SPI_TypeDef *) SPI1_BASE) 1067 #endif /*_SPI1 */ 1068 1069 #ifdef _USART1 1070 #define USART1 ((USART_TypeDef *) USART1_BASE) 1071 #endif /*_USART1 */ 1072 1073 #ifdef _DMA 1074 #define DMA ((DMA_TypeDef *) DMA_BASE) 1075 #endif /*_DMA */ 1076 1077 #ifdef _DMA_Channel1 1078 #define DMA_Channel1 ((DMA_Channel_TypeDef *) DMA_Channel1_BASE) 1079 #endif /*_DMA_Channel1 */ 1080 1081 #ifdef _DMA_Channel2 1082 #define DMA_Channel2 ((DMA_Channel_TypeDef *) DMA_Channel2_BASE) 1083 #endif /*_DMA_Channel2 */ 1084 1085 #ifdef _DMA_Channel3 1086 #define DMA_Channel3 ((DMA_Channel_TypeDef *) DMA_Channel3_BASE) 1087 #endif /*_DMA_Channel3 */ 1088 1089 #ifdef _DMA_Channel4 1090 #define DMA_Channel4 ((DMA_Channel_TypeDef *) DMA_Channel4_BASE) 1091 #endif /*_DMA_Channel4 */ 1092 1093 #ifdef _DMA_Channel5 1094 #define DMA_Channel5 ((DMA_Channel_TypeDef *) DMA_Channel5_BASE) 1095 #endif /*_DMA_Channel5 */ 1096 1097 #ifdef _DMA_Channel6 1098 #define DMA_Channel6 ((DMA_Channel_TypeDef *) DMA_Channel6_BASE) 1099 #endif /*_DMA_Channel6 */ 1100 1101 #ifdef _DMA_Channel7 1102 #define DMA_Channel7 ((DMA_Channel_TypeDef *) DMA_Channel7_BASE) 1103 #endif /*_DMA_Channel7 */ 1104 1105 #ifdef _FLASH 1106 #define FLASH ((FLASH_TypeDef *) FLASH_BASE) 1107 #define OB ((OB_TypeDef *) OB_BASE) 1108 #endif /*_FLASH */ 1109 1110 #ifdef _RCC 1111 #define RCC ((RCC_TypeDef *) RCC_BASE) 1112 #endif /*_RCC */ 1113 1114 #ifdef _SysTick 1115 #define SysTick ((SysTick_TypeDef *) SysTick_BASE) 1116 #endif /*_SysTick */ 1117 1118 #ifdef _NVIC 1119 #define NVIC ((NVIC_TypeDef *) NVIC_BASE) 1120 #define SCB ((SCB_TypeDef *) SCB_BASE) 1121 #endif /*_NVIC */ 1122 1123 /*------------------------ Debug Mode ----------------------------------------*/ 1124 #else /* DEBUG */ 1125 #ifdef _TIM2 1126 EXT TIM_TypeDef *TIM2; 1127 #endif /*_TIM2 */ 1128 1129 #ifdef _TIM3 1130 EXT TIM_TypeDef *TIM3; 1131 #endif /*_TIM3 */ 1132 1133 #ifdef _TIM4 1134 EXT TIM_TypeDef *TIM4; 1135 #endif /*_TIM4 */ 1136 1137 #ifdef _RTC 1138 EXT RTC_TypeDef *RTC; 1139 #endif /*_RTC */ 1140 1141 #ifdef _WWDG 1142 EXT WWDG_TypeDef *WWDG; 1143 #endif /*_WWDG */ 1144 1145 #ifdef _IWDG 1146 EXT IWDG_TypeDef *IWDG; 1147 #endif /*_IWDG */ 1148 1149 #ifdef _SPI2 1150 EXT SPI_TypeDef *SPI2; 1151 #endif /*_SPI2 */ 1152 1153 #ifdef _USART2 1154 EXT USART_TypeDef *USART2; 1155 #endif /*_USART2 */ 1156 1157 #ifdef _USART3 1158 EXT USART_TypeDef *USART3; 1159 #endif /*_USART3 */ 1160 1161 #ifdef _I2C1 1162 EXT I2C_TypeDef *I2C1; 1163 #endif /*_I2C1 */ 1164 1165 #ifdef _I2C2 1166 EXT I2C_TypeDef *I2C2; 1167 #endif /*_I2C2 */ 1168 1169 #ifdef _CAN 1170 EXT CAN_TypeDef *CAN; 1171 #endif /*_CAN */ 1172 1173 #ifdef _BKP 1174 EXT BKP_TypeDef *BKP; 1175 #endif /*_BKP */ 1176 1177 #ifdef _PWR 1178 EXT PWR_TypeDef *PWR; 1179 #endif /*_PWR */ 1180 1181 #ifdef _AFIO 1182 EXT AFIO_TypeDef *AFIO; 1183 #endif /*_AFIO */ 1184 1185 #ifdef _EXTI 1186 EXT EXTI_TypeDef *EXTI; 1187 #endif /*_EXTI */ 1188 1189 #ifdef _GPIOA 1190 EXT GPIO_TypeDef *GPIOA; 1191 #endif /*_GPIOA */ 1192 1193 #ifdef _GPIOB 1194 EXT GPIO_TypeDef *GPIOB; 1195 #endif /*_GPIOB */ 1196 1197 #ifdef _GPIOC 1198 EXT GPIO_TypeDef *GPIOC; 1199 #endif /*_GPIOC */ 1200 1201 #ifdef _GPIOD 1202 EXT GPIO_TypeDef *GPIOD; 1203 #endif /*_GPIOD */ 1204 1205 #ifdef _GPIOE 1206 EXT GPIO_TypeDef *GPIOE; 1207 #endif /*_GPIOE */ 1208 1209 #ifdef _ADC1 1210 EXT ADC_TypeDef *ADC1; 1211 #endif /*_ADC1 */ 1212 1213 #ifdef _ADC2 1214 EXT ADC_TypeDef *ADC2; 1215 #endif /*_ADC2 */ 1216 1217 #ifdef _TIM1 1218 EXT TIM1_TypeDef *TIM1; 1219 #endif /*_TIM1 */ 1220 1221 #ifdef _SPI1 1222 EXT SPI_TypeDef *SPI1; 1223 #endif /*_SPI1 */ 1224 1225 #ifdef _USART1 1226 EXT USART_TypeDef *USART1; 1227 #endif /*_USART1 */ 1228 1229 #ifdef _DMA 1230 EXT DMA_TypeDef *DMA; 1231 #endif /*_DMA */ 1232 1233 #ifdef _DMA_Channel1 1234 EXT DMA_Channel_TypeDef *DMA_Channel1; 1235 #endif /*_DMA_Channel1 */ 1236 1237 #ifdef _DMA_Channel2 1238 EXT DMA_Channel_TypeDef *DMA_Channel2; 1239 #endif /*_DMA_Channel2 */ 1240 1241 #ifdef _DMA_Channel3 1242 EXT DMA_Channel_TypeDef *DMA_Channel3; 1243 #endif /*_DMA_Channel3 */ 1244 1245 #ifdef _DMA_Channel4 1246 EXT DMA_Channel_TypeDef *DMA_Channel4; 1247 #endif /*_DMA_Channel4 */ 1248 1249 #ifdef _DMA_Channel5 1250 EXT DMA_Channel_TypeDef *DMA_Channel5; 1251 #endif /*_DMA_Channel5 */ 1252 1253 #ifdef _DMA_Channel6 1254 EXT DMA_Channel_TypeDef *DMA_Channel6; 1255 #endif /*_DMA_Channel6 */ 1256 1257 #ifdef _DMA_Channel7 1258 EXT DMA_Channel_TypeDef *DMA_Channel7; 1259 #endif /*_DMA_Channel7 */ 1260 1261 #ifdef _FLASH 1262 EXT FLASH_TypeDef *FLASH; 1263 EXT OB_TypeDef *OB; 1264 #endif /*_FLASH */ 1265 1266 #ifdef _RCC 1267 EXT RCC_TypeDef *RCC; 1268 #endif /*_RCC */ 1269 1270 #ifdef _SysTick 1271 EXT SysTick_TypeDef *SysTick; 1272 #endif /*_SysTick */ 1273 1274 #ifdef _NVIC 1275 EXT NVIC_TypeDef *NVIC; 1276 EXT SCB_TypeDef *SCB; 1277 #endif /*_NVIC */ 1278 1279 #endif /* DEBUG */ 1280 1281 /*在stm32f10x_conf.h上右击鼠标，open “stm32f10x_conf.h”，打开stm32f10x_conf.h文件。 1282 stm32f10x_conf.h文件是项目配置头文件，该头文件设置了所有用到的外设，没有用到的外设可以将其屏蔽掉，以节省编译时间。 1283 提示：如果修改不了stm32f10x_conf.h文件时，是因为该文件是只读属性，在属性中修改即可。 1284 1285 注意到main函数中有*/ 1286 #ifdef DEBUG 1287 debug(); 1288 #endif 1289 /*这段代码，那么DEBUG标示符是在哪定义的呢？是在stm32f10x_conf.h中定义的。 1290 还有，单片机的外部高速晶振HSE，不同的开发板可以有不同的值。那么HSE的值是在哪定义的呢？还是在stm32f10x_conf.h中。*/ 1291 /* Includes ------------------------------------------------------------------*/ 1292 #include "stm32f10x_type.h" 1293 1294 /* Exported types ------------------------------------------------------------*/ 1295 /* Exported constants --------------------------------------------------------*/ 1296 /* Uncomment the line below to compile the library in DEBUG mode, this will expanse 1297 the "assert_param" macro in the firmware library code (see "Exported macro" 1298 section below) */ 1299 /* #define DEBUG 1 */ 1300 1301 /* Comment the line below to disable the specific peripheral inclusion */ 1302 /************************************* ADC ************************************/ 1303 //#define _ADC 1304 //#define _ADC1 1305 //#define _ADC2 1306 1307 /************************************* BKP ************************************/ 1308 //#define _BKP 1309 1310 /************************************* CAN ************************************/ 1311 //#define _CAN 1312 1313 /************************************* DMA ************************************/ 1314 //#define _DMA 1315 //#define _DMA_Channel1 1316 //#define _DMA_Channel2 1317 //#define _DMA_Channel3 1318 //#define _DMA_Channel4 1319 //#define _DMA_Channel5 1320 //#define _DMA_Channel6 1321 //#define _DMA_Channel7 1322 1323 /************************************* EXTI ***********************************/ 1324 //#define _EXTI 1325 1326 /************************************* FLASH and Option Bytes *****************/ 1327 #define _FLASH 1328 /* Uncomment the line below to enable FLASH program/erase/protections functions, 1329 otherwise only FLASH configuration (latency, prefetch, half cycle) functions 1330 are enabled */ 1331 /* #define _FLASH_PROG */ 1332 1333 /************************************* GPIO ***********************************/ 1334 #define _GPIO 1335 //#define _GPIOA 1336 //#define _GPIOB 1337 //#define _GPIOC 1338 //#define _GPIOD 1339 //#define _GPIOE 1340 #define _AFIO 1341 1342 /************************************* I2C ************************************/ 1343 //#define _I2C 1344 //#define _I2C1 1345 //#define _I2C2 1346 1347 /************************************* IWDG ***********************************/ 1348 //#define _IWDG 1349 1350 /************************************* NVIC ***********************************/ 1351 #define _NVIC 1352 1353 /************************************* PWR ************************************/ 1354 //#define _PWR 1355 1356 /************************************* RCC ************************************/ 1357 #define _RCC 1358 1359 /************************************* RTC ************************************/ 1360 //#define _RTC 1361 1362 /************************************* SPI ************************************/ 1363 //#define _SPI 1364 //#define _SPI1 1365 //#define _SPI2 1366 1367 /************************************* SysTick ********************************/ 1368 //#define _SysTick 1369 1370 /************************************* TIM1 ***********************************/ 1371 //#define _TIM1 1372 1373 /************************************* TIM ************************************/ 1374 //#define _TIM 1375 //#define _TIM2 1376 //#define _TIM3 1377 //#define _TIM4 1378 1379 /************************************* USART **********************************/ 1380 //#define _USART 1381 //#define _USART1 1382 //#define _USART2 1383 //#define _USART3 1384 1385 /************************************* WWDG ***********************************/ 1386 //#define _WWDG 1387 1388 /* In the following line adjust the value of External High Speed oscillator (HSE) 1389 used in your application */ 1390 #define HSE_Value ((u32)8000000) /* Value of the External oscillator in Hz*/ 1391 1392 /* Exported macro ------------------------------------------------------------*/ 1393 #ifdef DEBUG 1394 /******************************************************************************* 1395 * Macro Name : assert_param 1396 * Description : The assert_param macro is used for function's parameters check. 1397 * It is used only if the library is compiled in DEBUG mode. 1398 * Input : - expr: If expr is false, it calls assert_failed function 1399 * which reports the name of the source file and the source 1400 * line number of the call that failed. 1401 * If expr is true, it returns no value. 1402 * Return : None 1403 *******************************************************************************/ 1404 #define assert_param(expr) ((expr) ? (void)0 : assert_failed((u8 *)__FILE__, __LINE__)) 1405 /* Exported functions ------------------------------------------------------- */ 1406 void assert_failed(u8* file, u32 line); 1407 #else 1408 #define assert_param(expr) ((void)0) 1409 #endif /* DEBUG */ 1410 /*在stm32f10x_type.h上右击鼠标，open “stm32f10x_type.h”，打开stm32f10x_type.h文件。 1411 stm32f10x_type.h文件包含所有其他文件所使用的数据和枚举类型。/* 1412 /* Includes ------------------------------------------------------------------*/ 1413 /* Exported types ------------------------------------------------------------*/ 1414 typedef signed long s32; 1415 typedef signed short s16; 1416 typedef signed char s8; 1417 1418 typedef signed long const sc32; /* Read Only */ 1419 typedef signed short const sc16; /* Read Only */ 1420 typedef signed char const sc8; /* Read Only */ 1421 1422 typedef volatile signed long vs32; 1423 typedef volatile signed short vs16; 1424 typedef volatile signed char vs8; 1425 1426 typedef volatile signed long const vsc32; /* Read Only */ 1427 typedef volatile signed short const vsc16; /* Read Only */ 1428 typedef volatile signed char const vsc8; /* Read Only */ 1429 1430 typedef unsigned long u32; 1431 typedef unsigned short u16; 1432 typedef unsigned char u8; 1433 1434 typedef unsigned long const uc32; /* Read Only */ 1435 typedef unsigned short const uc16; /* Read Only */ 1436 typedef unsigned char const uc8; /* Read Only */ 1437 1438 typedef volatile unsigned long vu32; 1439 typedef volatile unsigned short vu16; 1440 typedef volatile unsigned char vu8; 1441 1442 typedef volatile unsigned long const vuc32; /* Read Only */ 1443 typedef volatile unsigned short const vuc16; /* Read Only */ 1444 typedef volatile unsigned char const vuc8; /* Read Only */ 1445 1446 typedef enum {FALSE = 0, TRUE = !FALSE} bool; 1447 typedef bool BOOL; 1448 1449 typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus; 1450 1451 typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState; 1452 #define IS_FUNCTIONAL_STATE(STATE) ((STATE == DISABLE) || (STATE == ENABLE)) 1453 1454 typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus; 1455 1456 #ifndef NULL 1457 #define NULL ((void *)0) 1458 #endif 1459 1460 #define U8_MAX ((u8)255) 1461 #define S8_MAX ((s8)127) 1462 #define S8_MIN ((s8)-128) 1463 #define U16_MAX ((u16)65535u) 1464 #define S16_MAX ((s16)32767) 1465 #define S16_MIN ((s16)-32768) 1466 #define U32_MAX ((u32)4294967295uL) 1467 #define S32_MAX ((s32)2147483647) 1468 #define S32_MIN ((s32)2147483648uL) 1469 1470 /* Exported constants --------------------------------------------------------*/ 1471 /* Exported macro ------------------------------------------------------------*/ 1472 /* Exported functions ------------------------------------------------------- */ 1473 1474 #endif /* __STM32F10x_TYPE_H */ 1475 1476 /*在stm32f10x_map.h文件中，在stm32f10x_macro.h上右击鼠标，open “stm32f10x_macro.h”，打开stm32f10x_macro.h文件。 1477 stm32f10x_macro.h是cortex3_macro.s对应的头文件（即操作Cortex_M3核所需的头文件）*/ 1478 1479 /* Define to prevent recursive inclusion -------------------------------------*/ 1480 #ifndef __CORTEXM3_MACRO_H 1481 #define __CORTEXM3_MACRO_H 1482 1483 /* Includes ------------------------------------------------------------------*/ 1484 #include "stm32f10x_type.h" 1485 1486 /* Exported types ------------------------------------------------------------*/ 1487 /* Exported constants --------------------------------------------------------*/ 1488 /* Exported macro ------------------------------------------------------------*/ 1489 /* Exported functions ------------------------------------------------------- */ 1490 void __WFI(void); 1491 void __WFE(void); 1492 void __SEV(void); 1493 void __ISB(void); 1494 void __DSB(void); 1495 void __DMB(void); 1496 void __SVC(void); 1497 u32 __MRS_CONTROL(void); 1498 void __MSR_CONTROL(u32 Control); 1499 u32 __MRS_PSP(void); 1500 void __MSR_PSP(u32 TopOfProcessStack); 1501 u32 __MRS_MSP(void); 1502 void __MSR_MSP(u32 TopOfMainStack); 1503 void __SETPRIMASK(void); 1504 void __RESETPRIMASK(void); 1505 void __SETFAULTMASK(void); 1506 void __RESETFAULTMASK(void); 1507 void __BASEPRICONFIG(u32 NewPriority); 1508 u32 __GetBASEPRI(void); 1509 u16 __REV_HalfWord(u16 Data); 1510 u32 __REV_Word(u32 Data); 1511 1512 #endif /* __CORTEXM3_MACRO_H */