IDE - Hardware Reference & Information Document
1. 简介
1.1) 更多信息
2. IDE SPECIFICATIONS
3. 重要参考资料
4. IDE interface pin assignments
5. 寄存器地址编码
6. Pin Descriptions
7. I/O 端口功能描述
8. 寄存器功能描述
9. 命令描述
[Document Version: 1.00] [Last Updated: 9/11/96]
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1. 简介
Author: Alex T. Ivopol
E-Mail: ivopola@emco.co.nz
Date: Jan 19, 1994
"I haven't done an update and I don't think I will at this stage. It's a bit of a pain getting info on the latest ATA specs..."
(From the Editor)
We understand and thank you for doing what you have already done!
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1.1) 更多信息
(From the Editor)
I'll add a list of further IDE-info-related sites:
ANSI X3T10/948D (Standard for ATA-2 Interface, Revision 3, dated January 17, 1995) (R)
Maxtor's IDE FAQ (R)
Plug and Play ATA System Specification (Courtesy Quantum) (R)
ATA-3 FAQ (More PC-oriented) (R)
EIDE FAQ (Slow connection, might be a repeat of above) (R)
Some standards/references to look for:
AT Attachment Interface for Disk Drives,
ANSI X3.221-1994, Approved May 12, 1994.
AT Attachment Interface with Extensions (ATA-2),
ANSI ASC X3.279-1996, revision 3, proposed American National Standard 948D.
AT Attachment-3 Interface (ATA-3),
ANSI ASC X3.298-199x.
AT Attachment-4 Interface (ATA-4),
X3T13 draft.
ATA packet Interface for CD-ROMs,
SFF-8020, Revision 1.2, June 13 1994.
Western Digital Enhanced IDE Implementation Guide,
by Western Digital Corporation, revision 5.0.
Fast ATA Sourcebook,
Quantum Corporation, November 1994.
Enhanced Disk Drive Specification,
by Phoenix Technologies Ltd., version 1.1, January 95.
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2. IDE SPECIFICATIONS
本文档没有任何私有信息, 都是ATA specifications, 可以任意使用本文档,但不提供任何保证.
如果你仔细阅读后仍然不知所云,请尽快放弃.
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3. 重要参考资料
Quantum ProDrive 120/170/210AT OEM Hard Drive Reference.
FUJITSU M2617T/M2618T Intelligent Disk Drive OEM Manual.
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4. IDE interface pin assignments
+-----+-------------+--------+--------+
| Pin | Drive Cable | Signal | AT Bus |
| No | Signal Name | Flow | Pin |
+-----+-------------+--------+--------+
| 1 | -Reset | <- | B2 |
| 2 | Ground
| |
B1 |
| 3 |
D7 |
<-> | A2 |
| 4 |
D8 |
<-> | C11 |
| 5 |
D6 |
<-> | A3 |
| 6 |
D9 |
<-> | C12 |
| 7 |
D5 |
<-> | A4 |
| 8 | D10 | <-> | C13 |
| 9 |
D4 |
<-> | A5 |
| 10 | D11 | <-> | C14 |
| 11 | D3
| <-> | A6 |
| 12 | D12 | <-> | C15 |
| 13 | D2
| <-> | A7 |
| 14 | D13 | <-> | C16 |
| 15 | D1
| <-> | A8 |
| 16 | D14 | <-> | C17 |
| 17 | D0
| <-> | A9 |
| 18 | D15 | <-> | C18 |
| 19 | Ground | | B1 |
| 20 | KEY
|
| |
| 21 | Reserved
|
| |
| 22 | Ground | | B1 |
| 23 | -IOW | <- | B13 |
| 24 | Ground | | B1 |
| 25 | -IOR | <- | B14 |
| 26 | Ground | | B1 |
| 27 | -IOCHRDY | -> | A10 |
| 28 | SPSYNC/ALE | <- | B28 |
| 29 | Reserved
|
| |
| 30 | Ground | | B1 |
| 31 | INTRQ | -> | D7 |
| 32 | -IOCS16 | -> | D2 |
| 33 | ADDR1 | <- | A30 |
| 34 | -PDIAG
|
| |
| 35 | ADDR0 | <- | A31 |
| 36 | ADDR2 | <- | A29 |
| 37 | -CS1FX
|
| |
| 38 | -CS3FX
|
| |
| 39 | -DASP
|
| |
| 40 | Ground | | B1 |
+-----+-------------+--------+--------+
--------------------------------------------------------------------------------
5. 寄存器地址解码方式
主机采用 I/O 方式寻址硬盘驱动器. 主机地址线 A0, A1, A2, 片选 CS1FX- and CS3FX-, IOR- 和 IOW-
寻址磁盘寄存器. 主机地址线 A3...A9 产生两个片选: CS1FX- and CS3FX-.片选CS1FX- 访问八个硬盘
命令寄存器组. 片选信号 CS3FX- 在和控制寄存器组交换8位的
状态,控制,驱动器地址时有效.
A7 选择驱动器的master或alternate command block addresses.
(Note: 这意味着, host 提供了一个 primary 硬盘适配器, I/O 地址是1FX/3FX , 还提供一个secondary 适配器, I/O 地址17X/37X.
每一个适配器最多连接两块硬盘 [MASTER/SLAVED]).
下图是解码方式的图示:
HEX BINARY 描述
1FX 0001 1111 XXXX Primary Command Registers
3FX 0011 1111 XXXX Primary Control Registers
17X 0001 0111 XXXX Alternate Command Registers
37X 0011 0111 XXXX Alternate Control Registers
^
|
+--- Address bit A7
X 的意思是不关心
数据线 D8...D15 仅在 IOCS16- 有效期间并且驱动器正在传输数据时有效. ECC 信息仅仅出现在数据线D0...D7 ,此种传输中
D8...D15 是无效的.
--------------------------------------------------------------------------------
6. Pin Descriptions
-RESET
上电时, 电平稳定以后此pin至少有效 25 microseconds, 此后,要复位驱动器时才置有效.
D0...D15
双向数据总线. D0...D7 用于传输8 位数据,如寄存器和ECC数据.
KEY
防呆针.
-IOW
写选通. 在 -IOW 时钟的上升沿数据从host向驱动器传输.
-IOR
读选通. 下降沿有效.
-IOCHRDY
当此信号negated 时, 就会延长(阻塞) host 的寄存器访问的 cycle, 表示驱动器忙.当非negated 状态时处于高阻抗状态.
SPSYNC
spindle synchronization. This may be either input or output to the
drive depending on a vendor defined switch. If a drive is set to MASTER
the signal is output and if a drive is SLAVE the signal is input. There
is no requirement that each drive implementation be plug compatible to
the extent that a multiple vendor drive subsystem be operable. However
if drives are designed to match the following recommendations then
controllers can operate drives with a single implementation:
There can only be one MASTER drive at a time in a configuration. The
host or the drive designated as master can generate SPSYNC at least
once per revolution (it may be more than onceper revolution).
SPSYNC received by a drive is used as the synchronization signal to
lock the spindles in step. The time to achieve synchronization varies
and is indicated by the drive setting DRDY. If the drive does not
achieve synchronization, it will not set DRDY.
A master drive or a host generates SPSYNC and transmits it. A slave
does not generate SPSYNC and must be responsible to synchronize its
index to SPSYNC. If a drive does not support synchronization, it will
ignore SPSYNC. In the event that a previously synchronized drive loses
synchronization, it does not clear DRDY.
Prior to the introduction of this standard, this signal was defined as
ALE (Address Latch Enable) and was used for an address valid indication
from the host system. If used, the host address and chip selects, ADDR0
through ADDR2, CS1FX- and CS3FX- were valid at the negation of this
signal and remained valid while ALE was negated, therefore the drive
did not need to latch these signals with ALE.
INTRQ
用于向cpu通知中断请求. 通过清除 设备控制寄存器的 nIEN 位使能中断请求. 下列情况下驱动产生中断请求:
驱动软件复位(assertion of -RESET).
设置 设备控制寄存器的SRST位.
向命令寄存器写命令.
读取状态寄存器.
NOTE: 一些驱动器在PIO数据传输结束的时候产生INTRQ, 只是在单个扇区读取或者多个扇区多操作的最后一个扇区不报中断. PIO
数据传输时,在每一数据块传输开始时报INTRQ. 大多数情况下数据块指的是单个扇区,除非设置了Multiple Command.
一个例外是:在 格式化磁道, Write Sector(s), Write Buffer and Write Long commands
的时候传输的一个数据块的开始不会 assert INTRQ.
-IOCS16
告知host 16 位数据端口有效,寻址完成,已经准备好收发16 bit数据. This signal is an open
collector output. D8...D15 仅在-IOCS16 有效并且驱动器正在传输数据的时候有效. ECC 数据传输时,
仅仅使用 D0...D7.
ADDR0-2
选择驱动器内的一个寄存器或者数据端口.
-PDIAG
用于Drive 1 通知 Drive 0 自己已经通过自检. 在上电或者软件复位后, Drive 1 会在1 mesc 内取消
-PDIAG 指示Drive 0 忙. 然后,在30内 Drive 1 将使能-PDIAG , 意思是已经准备完成,可以提供状态数据.
-PDIAG 有效后, Drive 1 也许还不能接受命令,要到driver 1 完成复位并置位 DRDY.
接受到Diagnostics command后, Drive 1 在1 msec内取消 -PDIAG 信号,通知Drive 0
自己处于busy 状态.如果 Drive 1 存在, Drive 0 将会等待driver 1 取消此信号最多5 msec. Drive 1
在有效-PDIAG 之前应该清除BUSY 状态, 因为-PDIAG 用于指示 Drive 1 通过自检准备 is re透底状态信息.
如果-DASP 没有在复位初始化时被Drive 1 置有效, Drive 0 将在完成自己的自检后马上投递自己的状态并将Drive 1 的状态寄存器清零. Drive 0 在完成复位并置DRDY之前将无法接受命令.
-CS1FX
由地址解码逻辑从主机地址线a3...a9产生的片选信号. 通常在I/O 操作时有效,操作ports 1F0 through 1F7. -CS1FX 用于访问八个硬盘命令寄存器块.
-CS3FX
由地址解码逻辑从主机地址线a3...a9产生的片选信号. 通常在I/O 操作时有效,操作ports 3F0 through 3F7. -CS3FX 在访问控制寄存器块,状态寄存器块,设备控制寄存器时有效,是8bit操作.
NOTE: primary 适配器通过 I/O addresses 1FX and 3FX 访问, secondary 适配器通过I/O addresses 17X and 37X访问.
-DASP
是一个分时复用的寄存器,指示drive active 或者Drive 1 存在.open collector
output.上电初始化或者复位以后,Driver 1 在400Msec内使 -DASP 有效,通告他的存在. Drive 0 容许最多
450 msec 给 Drive 1 有效-DASP. 如果 Drive 1 不存在, Drive 0 可能使用 -DASP 驱动一个LED.
在Driver 1接受到第一个有效的命令后或者31秒后取消-DASP. 一旦取消 -DASP, 则任何一个驱动器都可以把它用作 activity indicator(比如LED?).
--------------------------------------------------------------------------------
7. I/O Port Functions
+----+------+------+---+---+---+----------------+---------------+
|Addr|-CS1FX|-CS3FX|SA2|SA1|SA0| Read (-IOR) | Write (-IOW) |
+----+------+------+---+---+---+----------------+---------------+-----------+
| | 0 | 0 | X | X
| X | ILLEGAL |
ILLEGAL |
<--+ |
| | 1 | 1 | X | X
| X | High Impedance | Not Used |
Control |
|3FX | 1 | 0 | 0 | X | X | High
Impedance | Not Used |
Block |
|3FX | 1 | 0 | 1 | 0 | X | High
Impedance | Not Used | Registers |
|3F6 | 1 | 0 | 1 | 1 | 0 | Altern
Status | Device Control|
| |
|3F7 | 1 | 0 | 1 | 1 | 1 | Drive
Address | Not Used |
<--+ |
+----+------+------+---+---+---+----------------+---------------+-----------+
|1F0 | 0 | 1 | 0 | 0 | 0 | Data
Port | Data Port
| <--+ |
|1F1 | 0 | 1 | 0 | 0 | 1 | Error
Register | Precomp
| | |
|1F2 | 0 | 1 | 0 | 1 | 0 | Sector
Count | Sector Count | Command |
|1F3 | 0 | 1 | 0 | 1 | 1 | Sector
Number | Sector Number | Block |
|1F4 | 0 | 1 | 1 | 0 | 0 | Cylinder Low | Cylinder Low | Registers |
|1F5 | 0 | 1 | 1 | 0 | 1 | Cylinder
High | Cylinder High |
| |
|1F6 | 0 | 1 | 1 | 1 | 0 | Drive /
Head | Drive / Head |
| |
|1F7 | 0 | 1 | 1 | 1 | 1 |
Status |
Command |
<--+ |
+----+------+------+---+---+---+----------------+---------------+-----------+
在加电或者复位后, 命令寄存器组被初始化成如下值:
REGISTER VALUE
1F1 Error : 01
1F2 Sector Count : 01
1F3 Sector Number : 01
1F4 Cylinder Low : 00
1F5 Cylinder High : 00
1F6 Drive / Head : 00
--------------------------------------------------------------------------------
8. 寄存器描述
1F0: Read/Write: 数据端口寄存器
host和设备的数据传输通过这个寄存器进行. 也用于格式化时传输扇区表,在执行Read/Write Long commands时传输8 bit 的ECC数据.
1F1: Read: 错误码寄存器
最后一次命令执行的状态信息.仅当状态寄存器的ERR位置位时此寄存器有效. 在加电和内部自检后此寄存器包含一个状态码.当状态寄存器的error位置位时此寄存器含义如下:
+-----+--------+-------------------------------------------------------------+
| BIT | Mnemon |
Description
|
+-----+--------+-------------------------------------------------------------+
| 7 | BBK | Bad block mark detected in the requested sector's ID field |
| 6 | UNC | Uncorrectable data error
encountered
|
| 5 | | Not
used
|
| 4 | IDNF | Requested sector's ID field not
found
|
| 3 | | Not
used
|
| 2 | ABRT | Command aborted due to drive status error or invalid command|
| 1 | TK0NF | Track 0 not found during execution of Recalibrate command |
| 0 | AMNF | Data address mark not found after correct ID field found |
+-----+--------+-------------------------------------------------------------+
1F1: Write: 写补偿
驱动忽略此寄存器.
1F2: Read/Write: 扇区计数
定义数据传输的扇区数量, 后续的命令里,如果此值是0 代表 256 个扇区.
如果命令执行成功,最后在这个寄存器里的值是0. 每一个扇区传输以后, 寄存器内的值减1,寄存器内的值代表了剩余要传输的扇区数目.
如果命令执行未成功, 寄存器内包含要完成这次传输还必须要传输的扇区数目.
1F3: Read/Write: 首扇区编号
包含传输的第一个扇区的ID. 从1 到每个磁道的最大值.
1F4: Read/Write: 柱面低8位
如果访问操作跨越柱面,其值自动增1,以反映当前柱面.
1F5: Read/Write: 柱面高8位
同1f4
1F6: Read/Write: 驱动器/磁头选择
数据格式如下:
+-----+----------+---------------------------------------------------------+
| BIT | Mnemonic |
Description
|
+-----+----------+---------------------------------------------------------+
| 7 | Reserved | 恒为
1
|
| 6 | Reserved | 恒为
0
|
| 5 | Reserved | 恒为
1
|
| 4 | DRV | 0 to select primary drive, 1 to select secondary drive. |
| 3 | HS3 | MSB of head
number.
|
| 2 | HS2
|
|
| 1 | HS1
|
|
| 0 | HS0 | LSB of head
number.
|
+-----+----------+---------------------------------------------------------+
Upon command completion this register is updated to refplect the head number currently selected.
1F7: Read: 状态寄存器
在每一个命令执行完成之后驱动器更新这个寄存器反映当前设备状态. 如果busy bit 置位, 其他位都是无效的.如果没有置位其格式如下:
+-----+----------+----------------------------------------------------------+
| BIT | Mnemonic |
Description
|
+-----+----------+----------------------------------------------------------+
| 7 | BUSY | Busy bit. Set by the controller logic of the drive when |
|
| | ever the
drive has access to and the host is locked out |
|
| | of the
Command Block Registers. Set under the following |
|
| |
conditions:
|
|
| | o
Within 400 nsec after the negation of RESET or after |
|
|
| SRST is set in the Device Control Register. After
a |
|
|
| reset it is recomended that BUSY be set no more
than |
|
|
| 30
seconds.
|
|
| | o
Within 400 nsec of a host write to the
Command |
|
|
| Register with a Recalibrate, Read Long, Read
Buffer, |
|
|
| Read, Read Verify, Initialize Drive Parameters,
Seek |
|
|
| Identify Drive, or Execute Drive Diagnostic
command. |
|
| | o
Within 5 microseconds following the transfer of 512 |
|
|
| bytes of data during the execution of a Write,
Write |
|
|
| Buffer or Format Track command; or 512 bytes of
data |
|
|
| and the appropriate number of ECC bytes during
the |
|
|
| execution of a Write Long
command.
|
|
|
| When BUSY is set no Command Block Register can
be |
|
|
| written too and a read of any Command Block
Register |
|
|
| returns the contents of the Status
Register. |
|
|
|
|
| 6 | DRDY | Drive Ready bit. Indicates that the drive is ready to |
|
| | accept
commands. When and error occurs, this bit stays |
|
| | unchanged
until the host reads the Status Register then |
|
| | again
indicates that hte drive is ready. On power up, |
|
| | this bit
should be cleared and should remain cleared |
|
| | until the
drive is up to speed and ready to accept a |
|
| |
command.
|
|
|
|
|
| 5 | DWF | Drive Write Fault bit. When an error occurs, this bit |
|
| | remains
unchanged until the host reads the
Status |
|
| | Register,
then again indicates the current write fault |
|
| |
status.
|
|
|
|
|
| 4 | DSC | Drive Seek
Complete bit. This bit is set when a seek |
|
| | operation is
complete and the heads are settled over a |
|
| | track. When
an error occurs, this bit remains unchanged |
|
| | until the
host reads the Status Register, then again it |
|
| | indicates the
current seek complete
status.
|
|
|
|
|
| 3 | DRQ | Data Request bit. When set it indicates that the drive |
|
| | is ready to
transfer a word or byte of data between the |
|
| | host and the
data
port.
|
|
|
|
|
| 2 | CORR | Corrected Data bit. When a correctable data error has |
|
| | been
encountered and the data has been corrected, this |
|
| | bit is set.
This condition does not terminate a multi |
|
| | sector read
operation.
|
|
|
|
|
| 1 | INDEX | Index bit. Set when the index mark is detected once per |
|
| | disk
revolution.
|
|
|
|
|
| 0 | ERROR | Error bit. When set indicates that the previous command |
|
| | ended in an
error. The other bits in the Error Register |
|
| | and Status
Register contain additional information about |
|
| | the cause of
the
error.
|
+-----+----------+----------------------------------------------------------+
1F7: Write: 命令寄存器
一旦命令写入寄存器,设备就开始执行这个命令.下面的表是各种命令和命令参数.
+--------+---------------------------------+-----------------+
| Command| Command Description | Parameters Used |
| Code
|
| PC SC SN CY DH |
+--------+---------------------------------+-----------------+
| 98h @ | Check Power
Mode
| V
D |
| E5h @ | Check Power Mode (same as 98h)
| V
D |
| 90h | Execute Drive
Diagnostic
|
D+ |
| 50h | Format
Track
| V
V |
| ECh @ | Identify
Drive
|
D |
| 97h @ |
Idle
| V
D |
| E3h @ | Idle (same as
97h)
| V
D |
| 95h @ | Idle
Immediate
|
D |
| E1h @ | Idle Immadiate (same as 95h)
|
D |
| 91h | Initialize Drive
Parameters |
V V |
| E4h @ | Read
Buffer
|
D |
| C8h @ | Read DMA With
Retry
| >> Unknown << |
| C9h @ | Read
DMA
| >> Unknown << |
| C4h @ | Read
Multiple
| V V V V |
| 20h | Read Sectors With
Retry
| V V V V |
| 21h | Read
Sectors
| V V V V |
| 22h | Read Long With
Retry
| V V V V |
| 23h | Read
Long
| V V V V |
| 40h | Read Verify Sectors With Retry | V V V V |
| 41h | Read Verify
Sectors
| V V V V |
| 1Xh |
Recalibrate
|
D |
| 7Xh |
Seek
| V
V |
| EFh @ | Set
Features
| V
D |
| C6h @ | Set Multiple
Mode
| V
D |
| 99h @ | Set Sleep
Mode
|
D |
| E6h @ | Set Sleep Mode (same as 99h)
|
D |
| 96h @ |
Standby
| V
D |
| E2h @ | Standby (same as
96h)
| V
D |
| 94h @ | Standby
Immediate
|
D |
| E0h @ | Standby Immediate (same as 94h)
|
D |
| 8Xh | Vendor
Unique
| >> Unknown << |
| 9Ah | Vendor
Unique
| >> Unknown << |
| C0h | Vendor
Unique
| >> Unknown << |
| C1h | Vendor
Unique
| >> Unknown << |
| C2h | Vendor
Unique
| >> Unknown << |
| C3h | Vendor
Unique
| >> Unknown << |
| F5h | Vendor
Unique
| >> Unknown << |
| F6h | Vendor
Unique
| >> Unknown << |
| F7h | Vendor
Unique
| >> Unknown << |
| F8h | Vendor
Unique
| >> Unknown << |
| F9h | Vendor
Unique
| >> Unknown << |
| FAh | Vendor
Unique
| >> Unknown << |
| FBh | Vendor
Unique
| >> Unknown << |
| FCh | Vendor
Unique
| >> Unknown << |
| FDh | Vendor
Unique
| >> Unknown << |
| FEh | Vendor
Unique
| >> Unknown << |
| FFh | Vendor
Unique
| >> Unknown << |
| E8h @ | Write
Buffer
|
D |
| CAh @ | Write DMA With
Retry
| >> Unknown << |
| CBh @ | Write
DMA
| >> Unknown << |
| C5h @ | Write
Multiple
| V V V V |
| E9h @ | Write
Same
| >> Unknown << |
| 30h | Write Sectors With
Retry |
V V V V |
| 31h | Write
Sectors
| V V V V |
| 32h | Write Long With
Retry
| V V V V |
| 33h | Write
Long
| V V V V |
| 3Ch @ | Write
Verify
| V V V V |
+--------+---------------------------------+-----------------+
KEY FOR SYMBOLS IN ABOVE TABLE:
PC Register 1F1: Write Precompensation
SC Register 1F2: Sector Count
SN Register 1F3: Sector Number
CY Register 1F4+1F5: Cylinder low + high
DH Register 1F6: Drive / Head
@ These commands are optional and may not be supported by some drives.
D Only DRIVE parameter is valid, HEAD parameter is ignored.
D+ Both drives execute this command regardless of the DRIVE parameter.
V Indicates that the register contains a valid paramterer.
Commands with >> Unknown << Parameters are not described in this document.
If a parameter is blank, then the command does not require the contents of that register.
3F6: Read: Alternate Status Register
Contains the same information as the Status Register in the Command
Block. Reading the Alternate Status Register does not imply an
interrupt acknowledge from the host or clear a pending interrupt. See
the description of the Status Register above for a definition of bits
in this register.
3F6: Write: Device Control Register
The bits in the Device Control Register are lister in the table below:
+-----+----------+----------------------------------------------------------+
| BIT | Mnemonic |
Description
|
+-----+----------+----------------------------------------------------------+
| 7 | Reserved
|
|
| 6 | Reserved
|
|
| 5 | Reserved
|
|
| 4 | Reserved
|
|
| 3 | 1 | Always
set.
|
| 2 | SRST | Host Software Reset bit. When this bit is set the drive |
|
| | is held
reset. If two drives are daisy chained on the |
|
| | interface,
this bit resets both drives simultaneously. |
|
|
|
|
| 1 | nIEN | Drive Interrupt Enable bit. The enable bit for the drive |
|
| | interrupt to
the host. When nIEN is 0 or the drive is |
|
| | selected the
host interrupt signal INTRQ is enabled |
|
| | through a tri
state buffer to the host. When nIEN is 1 |
|
| | or the drive
is not selected the host interrupt signal |
|
| | INTRQ is in a
hig himpedance state regardless of the |
|
| | presence or
absence of a pending
interrupt.
|
|
|
|
|
| 0 | 0 | Always
clear.
|
+-----+----------+----------------------------------------------------------+
3F7: Read: 驱动器地址状态寄存器
含有当前选择的驱动器和磁头的值. 含义如下:
+-----+----------+------------------------------------------------------+
| BIT | Mnemonic |
Description
|
+-----+----------+------------------------------------------------------+
| 7 | HiZ | This bit is in
high impedance when
read.
|
| 6 | nWTG | Write Gate bit. When a write to the hard drive is in |
|
| | progress,
nWTG is
0
|
| 5 | nHS3 | Negated MSB of head
number
|
| 4 | nHS2
|
|
| 3 | nHS1
|
|
| 2 | nHS0 | Negated LSB of head
number.
|
| 1 | nDS1 | Drive 1 Select bit. When 0, Drive 1 is selected. |
| 0 | nDS0 | Drive 0 Select bit. When 0, Drive 0 is selected. |
+-----+----------+------------------------------------------------------+
--------------------------------------------------------------------------------
9. 命令详解
适配器解码并执行载入Command Register的命令. 在包含两块硬盘的应用中,每个驱动都会接受到这个命令,但是
只有选定的驱动执行这个命令.
推荐按照如下步骤执行驱动命令:
1.等待驱动器清除 BUSY 位.
2.向命令寄存器组加载所需参数.
3.使能中断 (nIEN) bit.
4.等待驱动器设置DRDY.
5.向命令寄存器写入命令码.
6.驱动器开始执行指定操作.
The remainder of this section describes the function of each command.
90h: Execute Drive Diagnostic
Performs internal diagnostic tests implemented by the drive. Drive 0 sets BUSY within 400 nsec of the receipt of the command.
If Drive 1 is present:
Both drives execute diagnostics.
Drive 0 waits up to 5 seconds for Drive 1 to assert PDIAG-
If Drive 1 does not assert PDIAG-, indicatinf a failure, Drive 0 appends 80h with its own diagnostic status.
If the host detects a Drive 1 diagnostic failure when reading Drive 0 status it sets the DRV bit then reads the Drive 1 status.
If Drive 1 is not present:
Drive 0 reports only its own diagnostic results.
Drive 0 clears BUSY and generates an interrupt.
If Drive 1 fails diagnostics, Drive 0 appends 80h with its own
diagnostic status and loads that code in the Error Register. If Drive 1
passes its diagnostics or no Drive 1 is present, Drive 0 appends 00h
with its own diagnostic status and loads that in the Error Register.
The Diagnostic Code written to the Error Register is a unique 8 bit code as listed below.
+------+----------------------------------+
| Code |
Description
|
+------+----------------------------------+
| 01 | No error detected. |
| 02 | Formatter device error. |
| 03 | Sector buffer error. |
| 04 | ECC circuitry error. |
| 05 | Controller microprocessor error. |
| 8X | Drive 1
failed.
|
+------+----------------------------------+
50h: Format Track
The track address is specified in the Sector Count Register. When the
drive accepts this command, it sets the DRQ bit then waits for the host
to fill the sector buffer. When the buffer is full, the drive clears
DRQ, sets BUSY and begins command execution.
ECh: Identify Drive
This command enables the host to receive paramater information from the
drive. When the host issues this command, the drive sets BUSY, stores
the required parameter information in the sector buffer, sets DRQ and
generates an interrupt. The host then reads the information from the
sector buffer. The table below defines the words stored in the buffer.
All reserved fields should be zeros.
+-------+-----------------------------------------------------------------+
| Word |
Description
|
+-------+-----------------------------------------------------------------+
| 00h | Bit mapped general configuration information. True when bit set |
| | Bit 15: Reserved for non
magnetic
drives.
|
| | Bit 14: Format speed tolerance
gap not
required.
|
| | Bit 13: Track offset option not
available.
|
| | Bit 12: Data strobe offset
option not
available.
|
| | Bit 11: Rotational speed
tolerance is <
0.5%
|
| | Bit 10: Disk transfer rate not
> 10
MB/s
|
| | Bit 09: Disk transfer rate >
5 MB/s and < 10
MB/s
|
| | Bit 08: Disk transfer rate >
5
MB/s
|
| | Bit 07: Removable cartridge
drive.
|
| | Bit 06: Fixed
drive.
|
| | Bit 05: Spindle motor control
option not
implemented.
|
| | Bit 04: Head switch time >
15
microseconds.
|
| | Bit 03: Not MFM
encoded.
|
| | Bit 02: Not soft
sectored.
|
| | Bit 01: Hard
Sectored.
|
| | Bit 00:
Reserved.
|
|
|
|
| 01h | Number of logical cylinders in the default translation mode. |
|
|
|
| 02h |
Reserved.
|
|
|
|
| 03h | Number of logical heads in the default translation mode. |
|
|
|
| 04h | Number of unformatted bytes per logical
track.
|
|
|
|
| 05h | Number of unformatted bytes per
sector.
|
|
|
|
| 06h | Number of logical sectors per
track.
|
|
|
|
| 07h | Bits 15...08: Inter Sector Gap after Index & before splice. |
| | Bits 07...00: Inter Sector Gap
bytes.
|
|
|
|
| 08h | Bits 15...08:
Reserved.
|
| | Bits 07...00: Bytes in Phase
Lock Oscillator
field.
|
|
|
|
| 09h | Number of vendor unique status
words.
|
|
|
|
| 0Ah | Serial number, 20 ASCII chars, right aligned & padded with 20h. |
|
|
|
| 14h | Controller
type:
|
| | 0000h: Not
specified.
|
| | 0001h: Single ported, single
sector buffer capable of data |
|
| transfers only to or from
the host or the disk at one |
|
|
time.
|
| | 0002h: Dual ported, multiple
sector buffer capable
of |
|
| simultaneous data transfers
to and from the host, or |
|
| from the host and the
disk.
|
| | 0003h: Dual ported, multiple
sector buffer capable
of |
|
| simultaneous data transfers
with read
caching. |
| | 0004h-FFFFh:
Reserved.
|
|
|
|
| 15h | Buffer size in 512 byte
increments.
|
|
|
|
| 16h | Number of ECC bytes passed to host on R/W long operations. |
|
|
|
| 17h | Firmware revision, 8 ASCII chars, left aligned & space padded. |
|
|
|
| 1Bh | Model Number, 40 ASCII chars, left aligned & space padded. |
|
|
|
| 2Fh | READ/WRITE multiples
implemented.
|
|
|
|
| 30h | Supports double word I/O
transfer.
|
|
|
|
| 31h |
Reserved.
|
|
|
|
| 32h |
Reserved.
|
|
|
|
| 33h | Minimum PIO data transfer cycle time in
nsec.
|
|
|
|
| 34h | Minimum DMA data transfer cycle time in
nsec.
|
|
|
|
| 35h | All words past this point are
reserved.
|
+-------+-----------------------------------------------------------------+
91h: Initialize Drive Parameters
This command wnables the host to set the head switch and sector wrap
values for multi sector operations. Upon receipt of the command the
drive sets BUSY and generates an interrupt. The only two registers used
are the Sector Count Register which specifies the number of sectors and
the Drive/Head Register which specifies the number of heads minus one.
The DRV bit assigns these values to Drive 0 or Drive 1 as appropriate.
This command does not check the sector count and head values for
validity. If these values are invalid, the drive will not report an
error until another command causes an illegal access.
1Xh: Recalibrate
This command moves the read/write heads from any location on the disk
to cylinder 0. Upon receipt of this command, the drive sets BUSY and
issues a seek to cylinder 0. The drive the waits for the seel to
complete, updates status, negates BUSY and generates an interrupt.
E4h: Read buffer
This command enables the host to read the current contents of the
drive's sector buffer. When the host issues this command, the drive
sets BUSY, sets up the sector buffer for a read operation, sets DRQ,
clears BUSY, and generates an interrupt. The host then reads up to 512
bytes of data from the buffer.
Read Buffer and Write Buffer commands are synchronizes so that
sequential Read Buffer and Write Buffer commands access the same 512
bytes within the buffer.
20h: Read Sectors with Retry
21h: Read Sectors without Retry
The Read Sectors command reads from 1 to 256 sectors, beginning at the
specified sector. As specified in the Command Bloks Register, a sector
count equal to 0 requests 256 sectors. When the drive accepts this
command it sets BUSY and begins execution of the command.
For single sector reads, the drive performs an implicit seek if it is
not on the requested track. Once there it looks for the appropriate ID
field.
For no retry commands, if two index pulses occur without an error free
read of the requested ID field, the drive posts an ID not found error
in the Error Register.
For retry commands, the drive attempts to read the ID field up to a
vendor specific number of retries before reporting the error.
If the drive reads the requested ID field correctly, it must recognize
the data address mark within a specified number of bytes or report a
data address mark not found error. Once the drive finds the data
address mark it reads the data field into the sector buffer. If an
error occurs the drive sets the error bits, sets DRQ and generates an
interrupt. The drive always sets DRQ regardles of the presence or
absence of an error condition at the end of the sector. Upon command
completion the Command Block Register contains the cylinder, head,
sector of the last sector read.
22h: Read Long with Retry
23h: Read Long without Retry
For multiple sector reads, the drive sets DRQ, clears BUSY and
generates an interrupt each time the drive is ready to sent a sector to
the host. When the sector transfer completes the drive clears DRQ and
on all except the last sector sets BUSY. At the completion of the
command, the Command Block Register contains the cylinder, head, sector
of the last sector read.
If an uncorrectable error occurs during a multiple sector read, the
read terminates at the sector in which the error occured. The Command
Block Register contains the cylinder, head, sector where the error
occured. The host can then determine what error occurred and where.
Whether the error was correctable or uncorrectable the drive loads the
data in the sector buffer.
When a Read Long command executes, data and ECC bytes contained in the
data field of the requested sector are returned in the sector buffer.
The drive does not check the ECC bytes to determine if a data error has
occured. Multi sector Read Long opperations are supported.
40h: Read Verify Sector with Retry
41h: Read Verify Sector without Retry
The execution of this command is identical to the Read Sectors command
but the Read Verify command does not cause the drive to set DRQ, and
the drive transfers no data to the host. On receipt of Read Verify
commandm the drive sets BUSY. When the requested sectors have been
verified, the drive clears BUSY and generates an interrupt. Upon
command completion the Command Block Register contains the cylinder,
head, sector of the last sector verified.
If an error occurs during a multi sector verify, the verify terminates
at the sector in which the error occured and this can be found in the
Command Block Register.
7Xh: Seek
The seek command initiates a seek to the track and selects the head
specified in the Command Block Register. It is not necessary for the
drive to be formatted for a seek to execute properly. When the host
issues a Seek command the drive sets BUSY and generates an interrupt.
The drive will not set DSC until the seek is complete. A seek may net
be complete before the drive returns the interrupt. If the host issues
a new command to the drive while a seek is in progress, BUSY remains
set until the seek completes then the drive executes the new command.
EFh: Set Features
This command is used by the host to establish parameters that effect
the execution of certain drive features. When the drive receives this
command it sets BUSY, checks the contents of the Features Register
(Write Precomp Register), clears BUSY and generates an interrupt.
Features are drive specific and may include:
33h: retry inhibited
44h: 11 bytes ECC enabled
55h: disable read cache
77h: ECC disabled
88h: ECC enabled
99h: retry enabled
AAh: read cache enabled
BBh: 4 bytes ECC enabled
If the value in the Feature Register is not supported or is invalid, the drive aborts the command.
E8h: Write Buffer
This command enables the host to overwrite the contents of the drive's
sector buffer with any data pattern. On receipt of this comand the
drive sets BUSY within 400 nsec, sets up the sector buffer for a write
operation, sets DRQ and clears BUSY. The host then writes up to 512
bytes of data to the buffer. The Read Buffer and Write Buffer are
synchronized so that back to back Read Buffer and Write Buffer commands
access the same 512 bytes within the buffer.
30h: Write Sectors with Retry
31h: Write Sectors without Retry
This command writes from 1 to 256 sectors beginning at the specified
sector and as stated earlier, a sector count of 0 in the Command Block
Register will request 256 sectors. When the drive accepts this command
it sets DRQ and wait for the host to fill the sector buffer with the
data to be written to disk. No interrupt is generated to start the
first buffer fill operation and once the buffer is full the drive
clears the DRQ, sets BUSY and begins execution of the command.
For single sector Write operations, the drive sets DRQ upon receipt of
the command and waits for the host to fill the sector buffer. Once a
sector has been transferred, the drive sets BUSY and clears DRQ. If the
drive is not on the requested cylinder and head an inplied seek and/or
head switch is performed. Once the desired track is reached the drive
searches for the appropriate ID field.
If the ID field is read correctly, the information in the buffer,
including the ECC bytes is written to the disk. When the drive has
processed the sector, it clears BUSY and generated an interrupt. The
host reads the Status Register. At the completion of this command the
Command Block Registers contain the cylinder, head, sector of the last
sector written.
During multi sector Write operations, the drive sets DRQ, clears BUSY
and generated and interrupt on all but the first sector when it is
ready to receive a sector from the host. Once the sector transfer
comapletes, the drive clears DRQ, and sets BUSY. When the last sector
has been written to the disk, the drive clears BUSY, DRQ is already
clear, and generates an interrupt. At the completion of the command,
the Command Block Registers contain the cylinder, head, sector of the
last sector written to disk.
If an error occurs during a multi sector Write operation, the write
terminates at the sector in which the error occured. The Command Block
Register contains the cylinder, head, sector of the sector in which the
error occured. Ther host can then determine which error occured and
where.
32h: Write Long Sectors with Retry
33h: Write Long Sectors without Retry
写入数据和ECC,而非 When the Write Long command is executed, the
drive writes the data and ECC bytes from the sector buffer to disk. The
drive does not generate the ECC bytes itself. Multi sector Write Long
operations are supported. Operation is similar to the Write Sector
commands above.
--------------------------------------------------------------------------------
Please check attribution section for Author of this document! This
article was written by filipg@repairfaq.org The most recent version is
available on the WWW server http://www.repairfaq.org/filipg/
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