CP210X 系类
CP2102参考外围电路
| Name | Pin # | Type | Description | 说明 |
| VDD | 6 |
Power In Power Out |
3.0–3.6 V Power Supply Voltage Input. 3.3 V Voltage Regulator Output. |
3.0–3.6 V电源电压输入。 3.3V电压调节器输出。 |
| GND | 3 | Ground | 接地 | |
| RST | 9 | D I/O | Device Reset. Open-drain output of internal POR or VDD monitor. An external source can initiate a system reset by driving this pin low for at least 15 µs. | 设备重置。内部POR或VDD监视器的开漏输出。外部电源可通过将该引脚低驱动至少15µs来启动系统复位。 |
| REGIN | 7 | Power In | 5 V Regulator Input. This pin is the input to the on-chip voltage regulator. | 5 V调节器输入。该引脚是片上电压调节器的输入。 |
| VBUS | 8 | D In | VBUS Sense Input. This pin should be connected to the VBUS signal of a USB network. A 5 V signal on this pin indicates a USB network connection. | VBUS感应输入。此引脚应连接到USB网络的VBUS信号。此引脚上的5 V信号表示USB网络连接。 |
| D+ | 4 | D I/O | USB D+ | USB D接口+ |
| D- | 5 | D I/O | USB D– | USB D接口- |
| TXD | 26 | D Out | Asynchronous data output (UART Transmit) | 异步数据输出（UART传输） |
| RTX | 25 | D In | Asynchronous data input (UART Receive) | 异步数据输入（UART接收） |
| CTS | 23 | D In | Clear To Send control input (active low) | 清除发送控制输入（低电平有效） |
| RTS | 24 | D Out | Ready to Send control output (active low) | 准备发送控制输出（低有效） |
| DSR | 27 | D In | Data Set Ready control input (active low) | 数据集就绪控制输入（低电平有效） |
| DTR | 28 | D Out | Data Terminal Ready control output (active low) | 数据终端就绪控制输出（低电平有效） |
| DCD | 1 | D In | Data Carrier Detect control input (active low) | 数据载波检测控制输入（低电平有效） |
| RI | 2 | D In | Ring Indicator control input (active low) | 环形指示灯控制输入（低电平有效） |
| SUSPEND | 12 | D Out | This pin is driven high when the CP2102 enters the USB suspend state. | 当CP2102进入USB挂起状态时，该引脚被驱动为高电平。 |
| SUSPEND |
11 |
D Out | This pin is driven low when the CP2102 enters the USB suspend state | 当CP2102进入USB挂起状态时，该引脚被驱动为低电平 |
| NC | 10,13-22 | These pins should be left unconnected or tied to VDD. | 这些引脚应保持不连接或与VDD相连。 |