zoukankan      html  css  js  c++  java
  • mini2440移植uboot 2014.04(三)

    我修改的代码已经上传到github上,地址:https://github.com/qiaoyuguo/u-boot-2014.04-mini2440.git

    参考文档: s3c2440手册(下载地址) mini2440电路图(下载地址) K9F1G08数据手册(下载地址

    参考文章:《mini2440移植uboot 2011.03(下)

    前两篇博文: 《mini2440移植uboot 2014.04(一)

                          《mini2440移植uboot 2014.04(二)

    (五)添加nand flash支持

    主要是基于参考mini2440 自带的uboot源代码进行修改。

    用官方uboot启动时,得到的输出信息是128MiB的nand flash。查看芯片电路图可以知道是K9F系列芯片,而128MiB的芯片只能是K9F1G08(128Mx8bits)。

    在上一节执行uboot时,关于nand flash的显示信息如下:

    NAND:  board_nand_init()
    end of nand_init
    hwcontrol(): 0xff 0x83
    hwcontrol(): 0xffffffff 0x81
    dev_ready
    hwcontrol(): 0x90 0x83
    hwcontrol(): 0x00 0x85
    hwcontrol(): 0xffffffff 0x81
    dev_ready
    hwcontrol(): 0x90 0x83
    hwcontrol(): 0x00 0x85
    hwcontrol(): 0xffffffff 0x81
    dev_ready
    hwcontrol(): 0xffffffff 0x80
    0 MiB

    明显没有检测到nand flash.
    整个调用入口是nand_init->nand_init_chip->board_nand_init,而board_nand_init函数位于drivers/mtd/nand/s3c2410_nand.c中 。

    首先需要考虑的就是几个变量的值:tacls、twrph0、twrph1。

    参考文章《uboot中nand flash控制器参数TACLS、TWRPH0和TWRPH1的确定(基于K9F2G08U0B)》,这三个值是根据时序来计算出来的。

    根据K9F1G08手册第17页和第10页以及s3c2440手册587页,可以知道tacls=tCLS>12ns,twrph0=tWP>12ns,twrph1=tCLH>5ns。

    而nand flash是根据HCLK时钟来计算,根据1:4:8的分频,HCLK=100MHZ,每个时钟=10ns.

    可以将这三个值分别设置成2、2、1即可,但是为了保持和官方版本一致,我仍将其值设置成4、2、0.

    根据2440手册第226页,其NFCONT寄存器中每一位的含义与s3c2410中的大部分都不相同,需要进行相应的修改。


    我只是将mini2440中的uboot和当前代码合并,修改代码如下:

    #ifdef CONFIG_S3C2410
    #define S3C2410_NFCONF_EN          (1<<15)
    #define S3C2410_NFCONF_512BYTE     (1<<14)
    #define S3C2410_NFCONF_4STEP       (1<<13)
    #define S3C2410_NFCONF_INITECC     (1<<12)
    #define S3C2410_NFCONF_nFCE        (1<<11)
    #define S3C2410_NFCONF_TACLS(x)    ((x)<<8)
    #define S3C2410_NFCONF_TWRPH0(x)   ((x)<<4)
    #define S3C2410_NFCONF_TWRPH1(x)   ((x)<<0)
    
    #define S3C2410_ADDR_NALE 4
    #define S3C2410_ADDR_NCLE 8
    #endif
    
    #ifdef CONFIG_S3C2440
    #define S3C2410_NFCONT_EN          (1<<0)
    #define S3C2410_NFCONT_INITECC     (1<<4)
    #define S3C2410_NFCONT_nFCE        (1<<1)
    #define S3C2410_NFCONT_MAINECCLOCK (1<<5)
    #define S3C2410_NFCONF_TACLS(x)    ((x)<<12)  
    #define S3C2410_NFCONF_TWRPH0(x)   ((x)<<8)  
    #define S3C2410_NFCONF_TWRPH1(x)   ((x)<<4)  
    
    #define S3C2410_ADDR_NALE 0x08
    #define S3C2410_ADDR_NCLE 0x0c
    #endif

    #if defined(CONFIG_S3C2410)
                    if (ctrl & NAND_NCE)
                            writel(readl(&nand->nfconf) & ~S3C2410_NFCONF_nFCE,
                                   &nand->nfconf);
                    else
                            writel(readl(&nand->nfconf) | S3C2410_NFCONF_nFCE,
                                   &nand->nfconf);
            }
    #endif
    #if defined(CONFIG_S3C2440)
                    if (ctrl & NAND_NCE)
                            writel(readl(&nand->nfconf) & ~S3C2410_NFCONT_nFCE,
                                   &nand->nfconf);
                    else
                            writel(readl(&nand->nfconf) | S3C2410_NFCONT_nFCE,
                                   &nand->nfconf);
            }
    #endif
    #if defined(CONFIG_S3C2410)
            writel(readl(&nand->nfconf) | S3C2410_NFCONF_INITECC, &nand->nfconf);
    #endif

    #if defined(CONFIG_S3C2440)
            writel(readl(&nand->nfconf) | S3C2410_NFCONT_INITECC, &nand->nfconf);
    #endif

    #if defined(CONFIG_S3C2410)
            /* initialize hardware */
    #if defined(CONFIG_S3C24XX_CUSTOM_NAND_TIMING)
            tacls  = CONFIG_S3C24XX_TACLS;
            twrph0 = CONFIG_S3C24XX_TWRPH0;
            twrph1 =  CONFIG_S3C24XX_TWRPH1;
    #else
            tacls = 4;
            twrph0 = 8;
            twrph1 = 8;
    #endif
    #endif

    #if defined(CONFIG_S3C2440)
            tacls = 4;
            twrph0 = 2;
            twrph1 = 0;

            cfg = 0;
            cfg |= S3C2410_NFCONF_TACLS(tacls - 1);
            cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1);
            cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1);
            writel(cfg, &nand_reg->nfconf);

            cfg = (1<<4)|(1<<0);
        writel(cfg, &nand_reg->nfcont);
    #else
            cfg = S3C2410_NFCONF_EN;
            cfg |= S3C2410_NFCONF_TACLS(tacls - 1);
            cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1);
            cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1);
            writel(cfg, &nand_reg->nfconf);
            writel(cfg, &nand_reg->nfcont);
    #endif

    重新编译加载到mini2440,得到输出信息如下:

    NAND:  board_nand_init()
    end of nand_init
    hwcontrol(): 0xff 0x83
    hwcontrol(): 0xffffffff 0x81
    dev_ready
    hwcontrol(): 0x90 0x83
    hwcontrol(): 0x00 0x85
    hwcontrol(): 0xffffffff 0x81
    dev_ready
    hwcontrol(): 0x90 0x83
    hwcontrol(): 0x00 0x85
    hwcontrol(): 0xffffffff 0x81
    dev_ready
    hwcontrol(): 0xffffffff 0x80
    128 MiB

    执行一些命令,得到的输出信息:

    SMDK2410 # nand info
    
    Device 0: nand0, sector size 128 KiB
      Page size      2048 b
      OOB size         64 b
      Erase size   131072 b
    Initial value for argc=3
    Final value for argc=3
    Initial value for argc=3
    Final value for argc=3
    Initial value for argc=3
    Final value for argc=3

    貌似nand flash基本支持已经完成了,后面使用有问题了再修改代码。

    执行了几个nand命令,重新加载uboot到mini2440,却出现下面的错误:

    U-Boot 2014.04-g9541fe9-dirty (Jun 05 2014 - 15:45:56)
    
    U-Boot code: 33E80000 -> 33EF9ED0  BSS: -> 33F488D0
    CPUID: 32440001
    FCLK:      405 MHz
    HCLK:  101.250 MHz
    PCLK:   50.625 MHz
    monitor len: 000C88D0
    ramsize: 04000000
    TLB table from 33ff0000 to 33ff4000
    Top of RAM usable for U-Boot at: 33ff0000
    Reserving 802k for U-Boot at: 33f27000
    Reserving 4160k for malloc() at: 33b17000
    Reserving 32 Bytes for Board Info at: 33b16fe0
    Reserving 160 Bytes for Global Data at: 33b16f40
    New Stack Pointer is: 33b16f30
    RAM Configuration:
    Bank #0: 30000000 64 MiB
    addr=33f27000,_start=33e80000
    relocation Offset is: 000a7000
    WARNING: Caches not enabled
    monitor flash len: 000846C0
    dram_bank_mmu_setup: bank: 0
    Now running in RAM - U-Boot at: 33f27000
    Flash: fwc addr 00000000 cmd f0 00f0 16bit x 16 bit
    fwc addr 0000aaaa cmd aa 00aa 16bit x 16 bit
    fwc addr 00005554 cmd 55 0055 16bit x 16 bit
    fwc addr 0000aaaa cmd 90 0090 16bit x 16 bit
    fwc addr 00000000 cmd f0 00f0 16bit x 16 bit
    JEDEC PROBE: ID f0 ffff 0
    fwc addr 00000000 cmd ff 00ff 16bit x 16 bit
    fwc addr 00000000 cmd 90 0090 16bit x 16 bit
    fwc addr 00000000 cmd ff 00ff 16bit x 16 bit
    JEDEC PROBE: ID 90 ffff 0
    *** failed ***
    ### ERROR ### Please RESET the board ###

    居然又无法检测到nor flash了。我折腾了好一会儿,将nand flash全部擦除,然后将官方的uboot重新加载进来,

    之后再加载自己的uboot,能正常进入到uboot命令行了。

  • 相关阅读:
    StringBuffer与Stringbuilder
    String与其他类型的转换
    创建多进程的方法
    8.进程
    克隆虚拟机
    初探12306售票算法(二)-java代码实践
    初探12306售票算法(一)- 理论
    手机上mcd程序耗电异常问题相关
    vue版app上下拉加载
    css基础
  • 原文地址:https://www.cnblogs.com/qiaoqiao2003/p/3770008.html
Copyright © 2011-2022 走看看