http://wiki.altium.com/pages/viewpage.action?pageId=3080344
Land Pattern Information
Density Level A: Maximum (Most) Land Protrusion - For low-density product applications, the 'maximum' land pattern condition has been developed to accommodate wave or flow solder of leadless chip devices and leaded gull-wing devices. The geometry representing these devices, and inward and ''J''-formed lead contact device families, may provide a wider process window for reflow solder processes.
Density Level B: Median (Nominal) Land Protrusion - Products with a moderate level of component density may consider adapting the 'median' land pattern geometry. The median land patterns furnished for all device families will provide a robust solder attachment condition for reflow solder processes and should provide a condition suitable for wave or reflow soldering of leadless chip and leaded gull-wing type devices.
Density Level C: Minimum (Least) Land Protrusion - High component density typical of portable and hand-held product applications may consider the 'minimum' land pattern geometry variation. Selection of the minimum land pattern geometry may not be suitable for all product use categories. The use of classes of performance (1, 2, and 3) is combined with that of component density levels (A, B, and C) in explaining the condition of an electronic assembly. As an example, combining the description as Levels 1A or 3B or 2C, would indicate the different combinations of performance and component density to aid in understanding the environment and the manufacturing requirements of a particular assembly.
For example, for those packages that have density level fields in package sections below, a typical table entry would look like this
L = Least Use Environment (Level C - High Density).
M = Most Use Environment (Level A - Low Density),
N = Nominal Use Environment (Level B - Medium density),
http://blog.sina.com.cn/s/blog_450801a90101dptz.html
Altium designer 中PCB封装经常能见到IPC low density（低密度）、IPC medium density（中密度）、IPC high density（高密度） 之类的同一种封装，例如TSSOP16，为什么这么表述？
IPC是美国“印制电路板协会”（“The Institute of Printed Circuit“）的英文缩写。“印制电路板协会”后来数次更名，但IPC的简称却一直没变。IPC制定了许多种标准和规范，当然也包括PCB的标准和规范，IPC封装库即其中之一。
拿TSSOP16举例，低密度、中密度、高密度仅仅引脚长度不同，占据焊盘的面积自然不同。显然，低密度的引脚是最长的，高密度的引脚是最短的。
如果电路板面积较大，直接用IPC low density 好了。如果面积紧凑，那就要把三种导入原理图，量一量看哪种合适了。
有的封装会分 IPC high density、IPC medium density和IPC low density，不明白这个是什么意思，一个元件怎么判断它是属于哪一种的。求解，谢谢
仅仅是针对不同设计密度而言的。密度越高则该元件的占位面积越小。
选取何种封装取决于你线路板的空间冗余度/以及设计者的布线水平，一般建议初学者都按照低密度设计和预留空间。