Booth乘法器

目录

• 基本原理
• verilog 实现

基本原理

芯设计：Booth乘法器算法及其原理
https://mp.weixin.qq.com/s?__biz=MzU3ODgwMzI5NA==&mid=2247483680&idx=1&sn=616f582115c99526a4a18ca6f931fd12&chksm=fd6e8211ca190b07a54d88a182263410a5e347c2e5b09644de65186af562006ee51edd865724&scene=27#wechat_redirect

verilog 实现

芯设计：verilog系列-基2和基4的booth乘法器设计
https://mp.weixin.qq.com/s?__biz=MzU3ODgwMzI5NA==&mid=2247483685&idx=1&sn=d06f3a4ced52b42c48bd978e63e2d1bf&chksm=fd6e8214ca190b023383add3c7b60a2eeffae1f747ea2c1059ebee273e7241116d411384682d&scene=126&sessionid=1589012994&key=826ecc1d344963fb89a1fe763a3a0a3c6d8d706a9ef97ba15b329db58590b56ea54262ec5c331c21ac89e81717147cec8824d56cd54abdbb95c5cf0a5a692b36cc66ac50b6dada9f71b68e893f8cb271&ascene=1&uin=MTk3NDE3MDgyMg%3D%3D&devicetype=Windows+10+x64&version=62090070&lang=zh_CN&exportkey=AQ4%2BwrjRyeNZJrEsZxPofPE%3D&pass_ticket=dkwMmft8fNv1TNAobItN6BuADVUY3SXqwDEWdgd1XXquz3xUPDTVW48UvhGe4gkz
链接: https://pan.baidu.com/s/1bR0SK0NeeaenLC73E1kKNg 提取码: 4kat