zoukankan      html  css  js  c++  java
  • xps Xilinx Platform Studio

    Xilinx Platform Studio (XPS)

    XPS provides an integrated environment for creating software and hardware specification flows for embedded processor systems based on MicroBlaze™ and PowerPC® processors.

    XPS offers customization of tool flow configuration options and provides a graphical system editor for connection of processors, peripherals, and buses.

    EDK ships with IPs that have the IBM CoreConnect PLBv46 and AXI interfaces.

    Hardware Platform Generation Tool

    The Hardware Platform Generation tool (Platgen) customizes and generates the embedded processor system, in the form of hardware netlists (Hardware Description Language (HDL) files).

    By default, Platgen synthesizes each processor IP core instance found in your embedded hardware design using the XST compiler. Platgen also generates the system-level HDL file that interconnects all the IP cores, to be synthesized later as part of the overall Xilinx ISE® implementation flow.

    Base System Builder Wizard

    With the Base System Builder (BSB) wizard, you can quickly create a working embedded design, using any features of a supported development board or using basic functionality common to most embedded systems. After you create a basic system, you can then customize it using the tools in XPS and ISE. Xilinx recommends using the BSB. Refer to Using the Base System Builder.

    Simulation Model Generation Tool

    The Simulation Model Generation tool (Simgen) generates simulation models of your embedded hardware system based either on your original embedded hardware design (behavioral) or finished FPGA implementation (timing-accurate). Simgen can also incorporate your embedded software to run on the model.

    Note Simulation flows are not supported for Spartan®-3 and Spartan-3E architectures.

    For more information, refer to EDK Simulation Basics and the "Simulation Model Generator (Simgen)" chapter in the Embedded System Tools Reference Manual.

    Create and Import Peripheral Wizard

    The Create and Import Peripheral wizard helps you create your own peripherals and import them into EDK-compliant repositories or XPS projects. The wizard can create an HDL template for your custom logic and provides an interface to one of the supported AXI interfaces, IBM CoreConnect buses, or Xilinx FSL buses. Refer to Using the Create and Import Peripheral Wizard.

    Software Development Kit

    The Xilinx Software Development Kit (SDK) is the development environment for software application projects. SDK is based on the Eclipse open source standard.

    For more information about SDK, see the online help in the SDK tool. Refer also to Using the Software Development Kit.

    Version Management Tools

    The Format Revision Tool updates design files to the current format. The Version Management wizard helps migrate IPs and drivers created with an earlier EDK release to the latest version. For more information, see the "Version Management Tools" chapter of the Embedded System Tools Reference Manual.

    Bitstream Initializer

    The Bitstream Initializer (Bitinit) updates an FPGA configuration bitstream to initialize the on-chip instruction memory with the software executable.  For more information, see the "Bitstream Initializer (Bitinit)" chapter of the Embedded System Tools Reference Manual. Refer also to the help topics on downloading a design to an FPGA, starting with the Initializing Software Overview.

    Xilinx MicroProcessor Debugger

    Using Xilinx Microprocessor Debugger (XMD), you can debug your embedded application either on the host development system using an instruction set simulator, or on a board that has a Xilinx FPGA loaded with your hardware bitstream.

    For more information on XMD, see the "Microprocessor Debugger (XMD)" chapter in the Embedded System Tools Reference Manual.

  • 相关阅读:
    VMware虚拟机安装详细教程
    NLP知识点汇总(一)
    自动下载网页上的zip文件并自动解压
    django教程
    redis实现缓存可能带来的问题及总结
    使用github--stanfordnlp--glove训练自己的数据词向量
    mount.nfs: Stale file handle的解决方法
    集智学院 “Deep X:Deep Learning with Deep Knowledge”的公开讲座---总结
    字符串匹配算法总结 (一对一匹配,多模式匹配)
    java sql语句 like%?%报错的问题
  • 原文地址:https://www.cnblogs.com/zhangxiujun/p/4264196.html
Copyright © 2011-2022 走看看