8-1 流水灯控制器
1. 实验要求：采用有限状态机设计彩灯控制器，控制LED灯实现预想的演示花型。
2. 实验内容：
（1）功能：设计彩灯控制器，要求控制18个LED灯实现如下的演示花型：
- 从两边往中间逐个亮，全灭；
- 从中间往两头逐个亮，全灭；
- 循环执行上述过程；
2.1 流水灯控制器用两个always语句时间，条理更清晰。源码如下：
1 //water lamp 2 //2020-10-16 3 //by YongFengXie 4 module water_lamp(clk,rst_n,lamp); 5 input clk; 6 input rst_n; 7 output reg [17:0] lamp; 8 9 reg [4:0] state; 10 parameter s0=5'b00000, // all 0 11 s1=5'b00001, // light from edge to middle 12 s2=5'b00011, 13 s3=5'b00010, 14 s4=5'b00110, 15 s5=5'b00111, 16 s6=5'b00101, 17 s7=5'b00100, 18 s8=5'b01100, 19 s9=5'b01101, // all 1 20 s10=5'b01111, //all 00 21 s11=5'b01110, // light from middle to edge 22 s12=5'b01010, 23 s13=5'b01011, 24 s14=5'b01001, 25 s15=5'b01000, 26 s16=5'b11000, 27 s17=5'b11001, 28 s18=5'b11011, 29 s19=5'b11010; // all 1 30 31 always @(posedge clk or negedge rst_n) // state transition 32 begin 33 if(~rst_n) 34 state<=s0; 35 else case(state) 36 s0:state<=s1; 37 s1:state<=s2; 38 s2:state<=s3; 39 s3:state<=s4; 40 s4:state<=s5; 41 s5:state<=s6; 42 s6:state<=s7; 43 s7:state<=s8; 44 s8:state<=s9; 45 s9:state<=s10; 46 s10:state<=s11; 47 s11:state<=s12; 48 s12:state<=s13; 49 s13:state<=s14; 50 s14:state<=s15; 51 s15:state<=s16; 52 s16:state<=s17; 53 s17:state<=s18; 54 s18:state<=s19; 55 s19:state<=s0; 56 default:state<=s0; 57 endcase 58 end 59 60 always @(state) // demonstration pattern 61 begin 62 case(state) 63 s0:lamp<=18'b000_000_000_000_000_000; 64 s1:lamp<=18'b100_000_000_000_000_001; 65 s2:lamp<=18'b110_000_000_000_000_011; 66 s3:lamp<=18'b111_000_000_000_000_111; 67 s4:lamp<=18'b111_100_000_000_001_111; 68 s5:lamp<=18'b111_110_000_000_011_111; 69 s6:lamp<=18'b111_111_000_000_111_111; 70 s7:lamp<=18'b111_111_100_001_111_111; 71 s8:lamp<=18'b111_111_110_011_111_111; 72 s9:lamp<=18'b111_111_111_111_111_111; 73 s10:lamp<=18'b000_000_000_000_000_000; 74 s11:lamp<=18'b000_000_001_100_000_000; 75 s12:lamp<=18'b000_000_011_110_000_000; 76 s13:lamp<=18'b000_000_111_111_000_000; 77 s14:lamp<=18'b000_001_111_111_100_000; 78 s15:lamp<=18'b000_011_111_111_110_000; 79 s16:lamp<=18'b000_111_111_111_111_000; 80 s17:lamp<=18'b001_111_111_111_111_100; 81 s18:lamp<=18'b011_111_111_111_111_110; 82 s19:lamp<=18'b011_111_111_111_111_110; 83 default:lamp<=18'b000_000_000_000_000_000; 84 endcase 85 end 86 87 endmodule 88
2.2 流水灯控制电路的测试代码如下：
1 //water lamp testbench 2 //2020-10-16 3 //by YongFengXie 4 module water_lamp_tb; 5 reg clk; 6 reg rst_n; 7 wire [17:0] lamp; 8 9 water_lamp ub(clk,rst_n,lamp); 10 11 initial begin 12 clk=1'b0; 13 rst_n=1'b0; 14 #20 rst_n=1'b1; 15 #1000 $stop; 16 end 17 18 always #5 clk=~clk; 19 20 endmodule
2.3 流水灯花型演示电路的ModelSim仿真结果如图2-1，图2-2所示：
图2-1 流水灯仿真结果1
图2-2 流水灯仿真结果2
2.4 总结：流水灯控制电路的设计，或者说花型演示，规划好花型的个数，即状态，剩下就是纯体力活，这里状态编码尝试用了格雷码，毕竟
误码跳变的概率小，当然书上（王金明 数字系统设计与Verilog HDL 7th ，page 230）用的顺序码。