1 module Reset_Delay(iCLK,iRST,oRST_0,oRST_1,oRST_2); 2 input iCLK; 3 input iRST; 4 output reg oRST_0; 5 output reg oRST_1; 6 output reg oRST_2; 7 8 reg [21:0] Cont; 9 10 always@(posedge iCLK or negedge iRST) 11 begin 12 if(!iRST) 13 begin 14 Cont <= 0; 15 oRST_0 <= 0; 16 oRST_1 <= 0; 17 oRST_2 <= 0; 18 end 19 else 20 begin 21 if(Cont!=22'h3FFFFF) 22 Cont <= Cont + 1'b1; 23 if(Cont>=22'h1FFFFF) 24 oRST_0 <= 1; 25 if(Cont>=22'h2FFFFF) 26 oRST_1 <= 1; 27 if(Cont>=22'h3FFFFF) 28 oRST_2 <= 1; 29 end 30 end 31 32 endmodule
//-------------------------------------------------------------------------------
// TD_Detect： 通过检测消隐的iTD_HS的个数判断数据是否稳定;iTD_VS高电平有效.
//VSYNC(低电平有效) ------ ------
// --- ----------------------------- -------------------
//HREF 高电平有效 ---------------------------------------------------------------
//-------------------------------------------------------------------------------
1 module TD_Detect 2 ( 3 oTD_Stable, 4 iTD_VS,// 5 iTD_HS, 6 iRST_N 7 ); 8 input iTD_VS; 9 input iTD_HS; 10 input iRST_N; 11 output oTD_Stable; 12 reg TD_Stable; 13 reg Pre_VS; 14 reg [7:0] Stable_Cont; 15 // 16 assign TD_Stable = iRST_N; 17 assign oTD_Stable = TD_Stable; 18 always@(posedge iTD_HS or negedge iRST_N)begin 19 if(!iRST_N) 20 begin 21 TD_Stable <= 1'b0; 22 Stable_Cont <= 4'h0; 23 Pre_VS <= 1'b0; 24 end 25 else 26 begin 27 // 28 Pre_VS <= iTD_VS; 29 // 30 if(!iTD_VS)//表示进入消隐区域 31 Stable_Cont <= Stable_Cont+1'b1; 32 else 33 Stable_Cont <= 0; 34 // 35 if({Pre_VS,iTD_VS}==2'b01)//表示从消隐去进入数据有效区 36 begin 37 if ((Stable_Cont==24) || (Stable_Cont==25))//24、25(PAL制式)分别是顶场和低场消隐的行数 通过判断消隐去的行数 38 TD_Stable <= 1'b1; //判断数来据时PAL or NTSC制式 //GMK (Stable_Cont==9)NTSC制 39 else 40 TD_Stable <= 1'b0;//数据不稳定产生复位 41 end 42 end 43 end 44 endmodule
//-------------------------------------------------------------------------------
// Reset_Delay： TD_Detect 模块的TD_STABLE(低电平复位)信号做为复位信号，检测不到正常的格式则复位。
// oDLY0(低电平复位)最先恢复正常，sdram、linebuffer等
// oDLY1(低电平复位)第二恢复正常，ITU_656 Decoder等
// oDLY2(低电平复位)最后恢复正常, 其他模块等
//-------------------------------------------------------------------------------
1 module ITU_656_Decoder 2 ( 3 // Control Signals 4 input iRST_N, 5 input iTD_CLK27, 6 input iSwap_CbCr, 7 input iSkip, 8 // TV Decoder Input 9 input [7:0] iTD_DAT, 10 // Position Output 11 output [9:0] oTV_X, 12 output [9:0] oTV_Y, 13 output [31:0] oTV_Cont, 14 // YUV 4:2:2 Output 15 output [15:0] oYCbCr, 16 output oDVAL 17 ); 18 assign oTV_X = Count>>1; 19 assign oTV_Y = TV_Y; 20 assign oYCbCr = YCbCr; 21 assign oDVAL = Data_Valid; 22 assign oTV_Cont = Data_Cont; 23 24 // 25 reg [23:0] Window; 26 wire [23:0] Window_N; 27 always@(posedge iTD_CLK27 or negedge iRST_N)begin 28 if(!iRST_N) 29 Window <= 24'h0; 30 else 31 Window <= Window_N; 32 end 33 assign Window_N = {Window[15:0],iTD_DAT}; 34 35 // 36 wire SAV; 37 assign SAV = ((Window == 24'hff0000) && (iTD_DAT[4] == 1'h0)); 38 39 reg [17:0] Count,Count_N; 40 always@(posedge iTD_CLK27 or negedge iRST_N)begin 41 if(!iRST_N) 42 Count <= 18'h0; 43 else 44 Count <= Count_N; 45 end 46 always@(*)begin 47 if(SAV) 48 Count_N = 18'h0; 49 else if(Count == 1440) 50 Count_N = Count; 51 else 52 Count_N = Count + 1'h1; 53 end 54 55 reg Active_Video,Active_Video_N; 56 always@(posedge iTD_CLK27 or negedge iRST_N)begin 57 if(!iRST_N) 58 Active_Video <= 1'h0; 59 else 60 Active_Video <= Active_Video_N; 61 end 62 always@(*)begin 63 if(SAV) 64 Active_Video_N = 1'h1; 65 else if(Count == 1440) 66 Active_Video_N = 1'h0; 67 else 68 Active_Video_N = Active_Video; 69 end 70 71 reg Field,Field_N; 72 always@(posedge iTD_CLK27 or negedge iRST_N)begin 73 if(!iRST_N) 74 Field <= 1'h0; 75 else 76 Field <= Field_N; 77 end 78 always@(*)begin 79 if(Window == 24'hff0000) 80 Field_N = iTD_DAT[6]; 81 else 82 Field_N = Field; 83 end 84 85 reg Pre_Field; 86 always@(posedge iTD_CLK27 or negedge iRST_N)begin 87 if(!iRST_N) 88 Pre_Field <= 1'h0; 89 else 90 Pre_Field <= Field; 91 end 92 93 reg FVAL,FVAL_N; 94 always@(posedge iTD_CLK27 or negedge iRST_N)begin 95 if(!iRST_N) 96 FVAL <= 1'h0; 97 else 98 FVAL <= FVAL_N; 99 end 100 always@(*)begin 101 if(Window == 24'hff0000) 102 FVAL_N = !iTD_DAT[5]; 103 else 104 FVAL_N = FVAL; 105 end 106 107 reg Start,Start_N; 108 always@(posedge iTD_CLK27 or negedge iRST_N)begin 109 if(!iRST_N) 110 Start <= 1'h0; 111 else 112 Start <= Start_N; 113 end 114 always@(*)begin 115 if({Pre_Field,Field} == 2'b10) 116 Start_N = 1'h1; 117 else 118 Start_N = Start; 119 end 120 121 reg Data_Valid,Data_Valid_N; 122 always@(posedge iTD_CLK27 or negedge iRST_N)begin 123 if(!iRST_N) 124 Data_Valid <= 1'h0; 125 else 126 Data_Valid <= Data_Valid_N; 127 end 128 always@(*)begin 129 if(Start && Active_Video && FVAL && Count[0] && !iSkip) 130 Data_Valid_N = 1'h1; 131 else 132 Data_Valid_N = 1'h0; 133 end 134 135 reg [9:0] TV_Y,TV_Y_N; 136 always@(posedge iTD_CLK27 or negedge iRST_N)begin 137 if(!iRST_N) 138 TV_Y <= 10'h0; 139 else 140 TV_Y <= TV_Y_N; 141 end 142 always@(*)begin 143 if(!FVAL) 144 TV_Y_N = 10'h0; 145 else if(FVAL && SAV) 146 TV_Y_N = TV_Y + 1'h1; 147 else 148 TV_Y_N = TV_Y; 149 end 150 151 reg [31:0] Data_Cont,Data_Cont_N; 152 always@(posedge iTD_CLK27 or negedge iRST_N)begin 153 if(!iRST_N) 154 Data_Cont <= 32'h0; 155 else 156 Data_Cont <= Data_Cont_N; 157 end 158 always@(*)begin 159 if(!FVAL) 160 Data_Cont_N = 32'h0; 161 else if(Data_Valid) 162 Data_Cont_N = Data_Cont + 1'h1; 163 else 164 Data_Cont_N = Data_Cont; 165 end 166 167 reg [7:0] Cb,Cb_N; 168 reg [7:0] Cr,Cr_N; 169 reg [15:0] YCbCr,YCbCr_N; 170 171 always@(posedge iTD_CLK27 or negedge iRST_N)begin 172 if(!iRST_N) 173 begin 174 Cb <= 0; 175 Cr <= 0; 176 YCbCr <= 0; 177 end 178 else begin 179 if(iSwap_CbCr)//商=1440/9 180 case(Count[1:0]) 181 0 : Cb = iTD_DAT; 182 1 : YCbCr = {iTD_DAT,Cr}; 183 2 : Cr = iTD_DAT; 184 3 : YCbCr = {iTD_DAT,Cb}; 185 endcase 186 else 187 case(Count[1:0]) 188 0 : Cb = iTD_DAT; 189 1 : YCbCr = {iTD_DAT,Cb}; 190 2 : Cr = iTD_DAT; 191 3 : YCbCr = {iTD_DAT,Cr}; 192 endcase 193 end 194 end 195 196 endmodule 197 198
//------------------------------------------------------------------------------
// ITU_656_Decoder ：本模块实现去除消隐区,并将一行720个像素减为640个
// oRESET_1(低电平复位)第二恢复正常，ITU_656 Decoder等
// “XY”为控制字。“XY”的8个bit含义如下：
// • Bit7（Const），常数，总为1。
// • Bit6（F）,场同步信号，表示该行数据处于奇场还是偶场。
// • Bit5（V）,垂直同步信号，表示处于场消隐区间还是正程区间（有效数据行）。
// • Bit4（H）,水平同步信号，表示是“SAV”还是“EAV”。
// • Bit3-0（P3P2P1P0,纠错位。P3=V(XOR)H;P2=F(XOR)H;P1=F(XOR)V;P0=F(XOR)V(XOR)H。
// 其中， F：标记场信息，传输顶场时为0，传输底场时为1
// V：标记消隐信息，传输消隐数据时为1，传输有效视频数据时为0
// H：标记EAV还是SAV，SAV为0，EAV为1
//-------------------------------------------------------------------------------