SAP computer之input and MAR

Input and MAR

　　Below the program counter is the input and MAR block.

　　It includes the address and data switch registers. These switch registers are part of the input unit which allow you to send 4 address bits and 8 data bits to RAM. As you recall, instruction and data words are written into the RAM before a computer run.

　　The memory address register(MAR) is part of teh memory. During a computer run, the address in the program counter is latched into the MAR. A bit later, the MAR applies this 4-bits address to teh RAM, where a read operation is performed.

　　

library IEEE;
use ieee.std_logic_1164.all;
 3 use ieee.numeric_std.all;
 4
entity MAR is
port
(
    CLK        : in  std_logic;                    　--! Rising edge clock
    CLR        : in  std_logic;                    　--! Active high asynchronous clear
    LM         : in  std_logic;                   　 --! Active low load MAR
    D          : in  std_logic_vector(3 downto 0);   --! MAR 4-bit address input
    Q          : out std_logic_vector(3 downto 0)    --! MAR 4-bit address output
);
end MAR ;

architecture beh of MAR is
begin

process (CLR,CLK,LM,D)
begin
    if CLR = '1' then
        Q <= "0000";
    elsif LM = '0' then
        if (CLK'event and CLK = '1') then
            Q <= D;
        end if;
    end if;
end process;

end beh;